AP3015KTR-G1 Diodes Incorporated

Data Sheet MICRO POWER STEP-UP DC-DC CONVERTER AP3015/A General Description Features The AP3015/A are Pulse Frequency Modulation Low Quiescent Current (PFM) DC/DC converters. These two devices are func- In Active Mode (Not Switching): 17 A Typical tionally equivalent except the switching current limit. In Shutdown Mode: <1 A The AP3015 is designed for higher power systems Low Operating V IN with 350mA current limit, and the AP3015A is for 1.2V Typical for AP3015 lower power systems with 100mA current limit. 1.0V Typical for AP3015A Low V Switch CESAT The AP3015/A feature a wide input voltage. The oper- 200mV Typical at 300mA for AP3015 ation voltage is ranged from 1.2Vto 12V (1V to 12V 70mV Typical at 70mA for AP3015A for AP3015A). A current limited, fixed off-time con- High Output Voltage: up to 34V trol scheme conserves operating current, resulting in Fixed Off-Time Control high efficiency over a broad range of load current. They also feature low quiescent current, switching cur- Switching Current Limiting rent limiting, low temperature coefficient, etc. 350mA Typical for AP3015 100mA Typical for AP3015A o o Fewer tiny external components are required in the Operating Temperature Range: -40 C to 85 C applications to save space and lower cost. Furthermore, to ease its use in differnet systems, a dis- Applications able terminal is designed to turn on or turn off the chip. MP3, MP4 The AP3015/A are available in SOT-23-5 package. Battery Power Supply System LCD/OLED Bias Supply Handheld Device Portable Communication Device SOT-23-5 Figure 1. Package Type of AP3015/A May 2010 Rev. 1. 4 BCD Semiconductor Manufacturing Limited 1Data Sheet MICRO POWER STEP-UP DC-DC CONVERTER AP3015/A Pin Configuration K Package (SOT-23-5) SW 1 5 V IN GND 2 SHDN FB34 Figure 2. Pin Configuration of AP3015/A (Top View) Pin Description Pin Number Pin Name Function 1 SW Switch Pin. This is the collector of the internal NPN power switch. Minimize the trace area connected to this Pin to minimize EMI 2 GND Ground Pin. GND should be tied directly to ground plane for best performance 3 FB Feedback Pin. Set the output voltage through this pin. The formula is V =1.23V*(1+R1/ OUT R2). Keep the loop between Vout and FB as short as possible to minimize the ripple and noise, which is beneficial to the stability and output ripple 4 SHDN Shutdown Control Pin. Tie this pin above 0.9V to enable the device. Tie below 0.25V to turn off the device 5V Supply Input Pin. Bypass this pin with a capacitor as close to the device as possible IN May 2010 Rev. 1. 4 BCD Semiconductor Manufacturing Limited 2