Preliminary Datasheet 2A, 4MHz High Efficiency Synchronous Buck Converter AP3408 General Description Features The AP3408 is a current mode, PWM synchronous Input Voltage Range: 2.6 to 5.5V buck DC/DC converter, capable of driving a 2A load Adjustable Output from 0.8 to 5V with high efficiency, excellent line and load 0.8V Reference Voltage with 2% Precision regulation. It operates in continuous PWM mode. Output Current: 2A High Efficiency up to 95% The AP3408 integrates synchronous P-channel and Low R Internal Switches DSON N-channel power MOSFET switches with low Programmable Frequency: 300kHz to 4MHz on-resistance. It is ideal for portable applications Current Mode Control powered from a single Li-ion battery. 100% duty Forced Continuous-mode Operation cycle and low on-resistance P-channel internal power 100% Duty Cycle MOSFET can maximize the battery life. Synchronizable Switching Frequency Power Good Output Voltage Monitoring The switching frequency of AP3408 can be Built-in Soft-start programmable from 300kHz to 4MHz, which allows Built-in Short Circuit Protection small-sized components, such as capacitors and Built-in Thermal Shutdown Protection inductors A standard series of inductors from several Built-in Current Limit Function . different manufacturers are available. This feature greatly simplifies the design of switch-mode power supplies. Applications The AP3408 is available in DFN-33-10 and PSOP-8 packages. Portable Media Player Digital Still and Video Cameras Notebook DFN-33-10 PSOP-8 Figure 1. Package Types of AP3408 Jan. 2013 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 1 Preliminary Datasheet 2A, 4MHz High Efficiency Synchronous Buck Converter AP3408 Pin Configuration DN Package MP Package (DFN-33-10) (PSOP-8) Pin 1 Mark 1 10 COMP SHDN/ RT COMP SHDN/RT 8 1 2 SYNC 9 FB GND 2 FB Exposed Pad 7 Exposed Pad GND 3 8 PGOOD Connected to Connected to PGND PGND SW 3 VDD SW 7 6 4 VDD PGND56 PVDD PGND 5 PVDD 4 Figure 2. Pin Configuration of AP3408 (Top View) Pin Description Pin Number Pin Name Description DFN-33-10 PSOP-8 Oscillator resistor input. Connect a resistor to GND from 1 1 SHDN/RT this pin to set the switching frequency. Forcing this pin to V to shutdown the device DD External clock synchronization input. The oscillation frequency can be synchronized to an external oscillation 2 SYNC applied to this pin. When tied to VDD, the internal oscillator is selected Signal ground. All small-signal ground, such as the compensation components and the exposed pad should be 3 2 GND connected to this pin, which in turn connects to PGND at one point Internal power switch output. Connect this pin with one 4 3 SW terminal of the inductor Power ground. Connect this pin as close as possible to CIN 5 4 PGND and COUT Power input supply. Decouple this pin to PGND with a 6 5 PVDD capacitor Signal input supply. Decouple this pin to GND with a 7 6 VDD capacitor. Normally V is equal to V DD PVDD Power Good Indicator. Open-drain logic output that is 8 PGOOD pulled to ground when the output voltage is not within 12.5% of regulation point Feedback voltage. This pin is the inverting input of internal error amplifier. It senses the converter output voltage 9 7 FB through an external resistor divider. The internal reference voltage is 0.8V, which determines the output voltage through the resistor divider Compensation input. This pin is the output of internal error 10 8 COMP amplifier. Connect external compensation elements to this pin to stabilize the control loop Jan. 2013 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 2