AP65353 3A, 18V, 650kHz ADAPTIVE COT STEP-DOWN CONVERTER Description Pin Assignments The AP65353 is an adaptive constant on-time mode synchronous buck converter providing high efficiency, excellent transient response and high DC output accuracy for low-voltage regulation in digital ( Top View ) TV and monitor. The constant-on-time control scheme handles wide input/output EN 1 8 VIN voltage ratios and provides low external component count. The Exposed internal proprietary circuit enables the device to adopt both low equivalent series resistance (ESR) output capacitors, such as Pad BST 2 7 FB SP-CAP or POSCAP and ultra-low ESR ceramic capacitors. The adaptive on-time control supports seamless transition between VREG5 3 6 SW continuous conduction mode (CCM) at higher load conditions and discontinuous conduction mode (DCM) at lighter load conditions. 9 SS 4 5 PGND DCM allows AP65353 to maintain high efficiency at light load conditions. The AP65353 also features programmable soft-start, SO-8EP UVLO, OTP, OVP and OCP to protect the circuit. This IC is available in SO-8EP package. Applications Gaming Consoles Flat Screen TV Sets and Monitors Set-Top Boxes Home Audio Consumer Electronics Network Systems Green Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3).compliant. 2. See AP65353 Typical Applications Circuit INPUT 7 V 8 IN BST L1 IN C5 12V OUTPUT 1.5 H 6 0.1F V OUT ON 1 SW AP65353 1.05V EN OFF R1 2 8.25k C2 C1 FB 44F 20 F 3 4 R2 C4 VREG5 SS 5 22.1k C3 GND 8.2nF 1F Figure 1 Typical Application Circuit Pin Descriptions Pin Pin Number Function Name Enable input. EN is a digital input that turns the regulator on or off. Drive EN high to turn EN 1 on the regulator, drive it low to turn off. EN can be safely connected to VIN directly for automatic startup. Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive FB 2 voltage divider connected to it from the output voltage. Internal power supply output pin to connect an additional capacitor. Connect a 1F VREG5 3 (typical) capacitor as close as possible to the VREG5 and PGND. This pin is not active when EN is low. Soft-start control input pin. SS controls the soft start period. Connect a capacitor from SS SS 4 to PGND to set the soft-start period. Power Switching Output. SW is the switching node that supplies power to the output. SW 6 Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BST to power the high-side switch. Bootstrap pin. A bootstrap capacitor is connected between the BST pin and SW pin. The BST 7 voltage across the bootstrap capacitor drives the internal high-side NMOS switch. A 0.1F (typical) capacitor is required for proper operation. Supply input. A capacitor should be connected between the VIN pin and PGND pin to VIN 8 keep the DC input voltage constant. Power ground and GND. Exposed pad must be connected to as large of PGND plane as PGND 5, 9 (Exposed Pad) possible for maximum thermal performance. 2 of 15 AP65353 June 2018 Diodes Incorporated www.diodes.com Document number: DS37925 Rev. 2- 2