AP7173 1.5A LOW DROPOUT LINEAR REGULATOR WITH PROGRAMMABLE SOFT-START Description Pin Assignments ( Top View ) The AP7173 is a 1.5A low-dropout (LDO) linear regulator that features a user-programmable soft-start, an enable input and 1 10 OUT IN a power-good output. 9 OUT IN 2 The soft-start reduces inrush current of the load capacitors 8 FB 3 PG and minimizes stress on the input power source during start- 7 SS VCC 4 up. The enable input and power-good output allow users to EN 5 6 GND configure power management solutions that can meet the DFN3030-10 sequencing requirements of FPGAs, DSPs, and other (Top View) applications with different start-up and power-down requirements. IN 1 8 OUT The AP7173 is stable with any type of output capacitor of 7 PG 2 FB 2.2F or more. A precision reference and feedback control VCC 3 6 SS deliver 2% accuracy over load, line, and operating temperature ranges. The AP7173 is available in both EN 4 5 GND DFN3030-10 and SO-8EP packages. SO-8EP Features Applications Low V and wide V range: 1.0V to 5.5V PCs, Servers, Modems, and Set-Top-Boxes IN IN Bias voltage (V ) range: 2.7V to 5.5V FPGA Applications VCC Low V range: 0.8V to 3.3V DSP Core and I/O Voltages OUT Low dropout: 165mV typical at 1.5A, V = 5V Post-Regulation Applications VCC 2% accuracy over line, load and temperature range Applications With Sequencing Requirements Power-Good (PG) output for supply monitoring and for sequencing of other supplies Programmable soft-start provides linear voltage startup Bias supply permits low V operation with good transient IN response Stable with any output capacitor 2.2F DFN3030-10 and SO-8EP: available in Green molding compound (No Br, Sb) Lead-free finish/ RoHS Compliant (Note 1) Note: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at AP7173 1.5A LOW DROPOUT LINEAR REGULATOR WITH PROGRAMMABLE SOFT-START Typical Application Circuit (Continued) Table 1. Resistor Values for Programming the Output Voltage (Note 2) R (k) R (k) V (V) 1 2 OUT Short Open 0.8 0.619 4.99 0.9 1.13 4.53 1 1.37 4.42 1.05 1.87 4.99 1.1 2.49 4.99 1.2 4.12 4.75 1.5 3.57 2.87 1.8 3.57 1.69 2.5 3.57 1.15 3.3 Note: 2 VOUT = 0.8 x (1 + R1 / R2) Table 2. Capacitor Values for Programming the Soft-Start Time (Note 3) CSS SOFT-START TIME Open 0.1ms 270pF 0.5ms 560pF 1ms 2.7nF 5ms 5.6nF 10ms 0.01F 18ms 7 Note: 3. tSS(s) = 0.8 x CSS(F) / (4.4 x 10 ) Figure 2. Turn-On Response 2 of 15 April 2011 AP7173 Diodes Incorporated www.diodes.com Document number: DS31369 Rev. 9 - 2