PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3EQX7502AI 5.0Gbps, 1-port, USB3.0 ReDriver Description Features USB 3.0 compatible Pericom Semiconductors PI3EQX7502AI is a low power, high performance 5.0 Gbps signal ReDriver designed specicfi ally Full Compliancy to USB3.0 Super Speed Standard for the USB 3.0 protocol. The device provides programmable Two 5.0Gbps differential signal pairs equalization, De-Emphasis, and input threshold controls to Adjustable Receiver Equalization optimize performance over a variety of physical mediums by 100 Differential CML I/Os reducing Inter-Symbol Interference. PI3EQX7502AI supports Pin Configured Output Emphasis Control two 100 Differential CML data I/Os between the Protocol ASIC Input signal level detect and squelch for each channel to a switch fabric, over cable, or to extend the signals across oth- Automatic Receiver Detect with digital enable/disable er distant data pathways on the users platform. The integrated Low Power : ~330mW equalization circuitry provides flexibility with signal integrity of the signal before the ReDriver. A low-level input signal detec- AutoSlumbe mode for adaptive power management tion and output squelch function is provided for each channel. Stand-by Mode Power Down State Each channel operates fully independently. When the chan- Industrial Temp Support (-40C to 85C) nels are enabled EN x = 0 and operating, that channels input Single Supply Voltage: 3.3V signal level (on xI+/-) determines whether the output is active. If the Packaging: 24-Pin TQFN (4x4mm) input signal level of the channel falls below the active threshold level (Vth-) then the outputs are driven to the common mode voltage. In addition to signal conditioning, when EN x = 1, the Pin Diagram (Top Side View) device enters a low power standby mode. The PI3EQX7502AI also includes a fully programmable receiver detect function. 3.3V Operation When the RXD-EN pin is pulled high, automatic receiver de- tection will be active. The receiver detection loop will be active 242322212019 again if the corresponding channels signal detector is idle for Vdd33 1 NC 18 longer than 7.3mS. The channel will then move to Unplug Mode EQ A 2 EQ B 17 DE A 3 if load not detected, or it will return to Low Power Mode (Slum- DE B 16 GND 4 NC 15 NC ber Mode) due to inactivity. 5 RxD EN 14 DNC 6 NC 13 Vdd33 7 8 9 101112 Figure1 Pericom USB 3.0 Block Diagram PC Monitor ReDriver Signal Detection Tablet PC CML Digital Camera CML XO+ XI+ Limiting Equalizer Amp XI XO EQ x - Repeated 2 times - External Storage USB 3.0 Cable Device Multi-function Printer Power Management 13-0024 PS9065 03/14/13 1 NC NC RXA- TXA- RXA+ TXA+ EN A EN B TXB- RXB- TXB+ RXB+PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3EQX7502AI 5.0Gbps, 1-Port, USB3.0 ReDriverwith Digital Configuration Pin Description Pin Pin Name Type Description Set the equalization of two channels. These are Tri-level input pins. When set toHIG 2 EQ A Input the pin becomes Logic1 when set toope, the pin becomesope, when set to 17 EQ B lo, the pin becomes logic0 . Please refer to Mode Adjustment on page 3. Channel A Enable. When the pin is drivenLo Channel A is in normal operation. When 10 EN A Input the pin is driven High, Channel A is in power down mode. With internal 200k pull- down resistor. Channel B Enable. When the pin is driven Low Channel B is in normal operation. When 21 EN B Input the pin is driven High, Channel B is in power down mode. With internal 200k pull- down resistor. 9 RXA+ 8 RXA- CML input channels. With Selectable input termination between 50 to internal V and bias Input 19 RXB+ 60K to GND. The input pins are pin polarity reversible. 20 RXB- 22 TXA+ 23 TXA- Selectable output termination between 50 to internal V and 2k to internal V . bias bias Output 12 TXB+ The output pins are pin polarity reversible. 11 TXB- 4 6 7 14 DNC DNC No Connect 15 18 24 1 VDD33 Power 3.3V Voltage Supply 13 Center Pad GND GND Supply Ground. Set the de-emphasis of the output CML buffer. These are Tri-level input pins. When set to 3 DE A, Inputhig, the pin becomes logic1 when set toope, the pin becomesope when set 16 DE B tolo, the pin becomes logic0 . Please refer to Mode Adjustment on page 3. Set the state of receiver detection of two channels. Low means no receiver detection and 5 RxD EN Input high means the receiver detection is active. With internal 200k pull-up resistor. Power Management Notebooks, netbooks, and other power sensitive consumer devices require judicious use of power in order to maximize battery life. In order to minimize the power consumption of our devices, Pericom has added an additional adaptive power management feature. When a signal detector is idle for longer than 1.3ms, the corresponding channel will move to low power mode ONLY. (It means both channels will move to low power mode individually). In the slumber mode, the signal detector will still be monitoring the input channel. If a channel is in slumber mode and the input signal is detected, the corresponding channel will wake-up immediately. If a channel is in slumber mode and the signal detector is idle longer than 6ms, the receiver detection loop will be active again. If load is not detected, then the Channel will move to Device Unplug Mode and monitor the load continuously. If load is detected, it will return to Slumber Mode and receiver detection will be active again per 6ms. e dTh evice can also be forced into low power standby mode through the use of the EN x pins however this would require the use of GPIO pins to control. PS9065 03/14/13 13-0024 2