PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3EQX7742AI 5.0 Gbps, 2-port, USB 3.0 ReDriver with Digital Confguration Description Features USB 3.0 compatible Pericom Semiconductors PI3EQX7742AI is a low power, high performance 5.0 Gbps signal ReDriver designed specicfi ally for Four 5.0 Gbps differential signal pairs the USB 3.0 protocol. The device provides programmable equal- Adjustable Receiver Equalization ization, De-Emphasis, and input threshold controls to optimize 100 Differential CML I/Os performance over a variety of physical mediums by reducing Pin Configured Output Emphasis Control Inter-Symbol Interference. PI3EQX7742AI supports four 100 Input signal level detect and squelch for each channel Differential CML data I/Os between the Protocol ASIC to a switch fabric, over cable, or to extend the signals across other Automatic Receiver Detect with digital enable/disable distant data pathways on the users platform. Low Power ~660mW e iTh ntegrated equalization circuitry provides flexibility with AutoSlumbe mode for adaptive power management signal integrity of the signal before the ReDriver. A low-level Stand-by Mode Power Down State input signal detection and output squelch function is provided Industrial Temp Support (-40C to 85C) for each channel. Single Supply Voltage: 3.3V Each channel operates fully independently. When the channels Packaging: 42-Pin TQFN (3.5x9mm) are enabled EN x = 0 and operating, that channels input signal level (on xI+/-) determines whether the output is active. Pin Diagram (Top Side View) If the input signal level of the channel falls below the active threshold level (Vth-) then the outputs are driven to the common mode voltage. In addition to signal conditioning, when EN x =1, the device enters a low power standby mode. The PI3EQX7742AI also includes a fully programmable receiver detect function. 42 41 40 39 NC 1 38 NC When the RxDet pin is pulled high, automatic receiver detection AI+ 2 37 AO+ AI- AO- 3 36 will be active. The device will then move to power down due EN A EN B 4 35 to inactivity. BO- 34 BI- 5 BO+ 6 33 BI+ NC 7 32 V DD33 Block Diagram EQ B 8 31 VTH AB DE B DE C 9 30 VTH CD EQ C 10 29 Signal Detection V 28 NC DD33 11 CI+ 12 27 CO+ CI- 13 26 CO- EN C 14 25 EN D DI- DO- 15 24 CML DO+ DI+ 16 23 NC 22 NC 17 CML 18 19 20 21 + XO+ XI Limiting Equalizer Amp XI XO EQ x Figure1 - Repeated 2 times - Power Management External USB 3.0 Storage Device ReDriver USB 3.0 Cable www.pericom.com PS-0.2 09/26/2012 13-0005 1 PI3EQX6701PI3EQX7711 EQ D V DD33 DE D RxDet AB RxDet CD DE A V EQ A DD33PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3EQX7742AI 5.0 Gbps, 2-port USB 3.0 ReDriver with Digital Configuration Pin Description Pin Pin Name Type Description 1, 7, 17, 22, NC NC No Connect 28, 38 CML input channels. With Selectable input termination between 50 to internal V BIAS 2, 3 AI+, AI- Input and Hi-Z. Selectable output termination between 50 to internal Vbias and 2k to internal 5, 6 BO-, BO+ Output Vbias, and Hi-Z. CML input channels. With Selectable input termination between 50 to internal V BIAS 12, 13 CI+, CI- Input and Hi-Z. Selectable output termination between 50 to internal Vbias and 2k to internal 15, 16 DO-, DO+ Output Vbias, and Hi-Z. CML input channels. With Selectable input termination between 50 to internal V BIAS 23, 24 DI+, DI- Input and Hi-Z. Selectable output termination between 50 to internal Vbias and 2k to internal 26, 27 CO-, CO+ Output Vbias, and Hi-Z. CML input channels. With Selectable input termination between 50 to internal V BIAS 33, 34 BI+, BI- Input and Hi-Z. Selectable output termination between 50 to internal Vbias and 2k to internal 36, 37 AO-, AO+ Output Vbias, and Hi-Z. 11, 21, 32, VDD33 Power 3.3V Voltage Supply 42 Equalization Adjustment. Tri-level input pin. When set tohig, the pin becomes EQ A, EQ B, 39, 8, 18, 29 Input logic1 when set toope, the pin becomesope when set tolo, the pin be- EQ D, EQ C comes logic0 . Please refer to Mode Adjustment on page 3. Set the de-emphasis of the output CML buffer. Tri-level input pin. When set tohig, DE A, DE B, 40, 9, 19, 30 Input the pin becomes logic1 when set toope, the pin becomesope when set to DE D, DE Clo, the pin becomes logic0 . Please refer to Mode Adjustment on page 3. VTH CD, Set the voltage threshold of two channels.Lo means VTH at (50mV, 110mV) Hig 10, 31 Input VTH AB means VTH at (80mV, 150mV) EN A , EN C , Channel Enable. Low = Channel is in normal operation. High = Channel is in 4, 14, 25, 35 Input EN D , EN B power down mode. With internal 200k pull-down resistor. Set the state of receiver detection of two channels. Low means no receiver detection RXDET CD, 20, 41 Input and high means the receiver detection is active. With internal 200k pull-up resis- RXDET AB tor. Center Pad GND GND Supply Ground. Adaptive Auto Power Down orSlumbe Mode Notebooks, netbooks, and other power sensitive consumer devices require judicious use of power in order to maximize battery life. In order to minimize the power consumption of our devices, Pericom has added an additional adaptive auto power down feature. When a signal detector is idle for longer than 5ms, the corresponding channel will move to low power mode ONLY. (It means both channels will move to low power mode individually). In the low power mode, the signal detector will still be monitoring the input channel. If the channel is in low power mode and the input signal is detected, the corresponding channel will wake up . e dTh evice can also be forced into power down mode through the use of the EN x pins however this would require the use of GPIO pins to control. www.pericom.com PS-0.2 09/26/2012 13-0005 2