A product Line of Pb Diodes Incorporated Lead-free Green PI3PCIE3415A 3.3V, PCI Express 3.0 2-Lane, 2:1 Mux/DeMux Switch Description Features e PTh I3PCIE3415A is an 8-to-4 differential channel multiplexer/ Four Differential Channel, 2:1 Mux/DeMux demultiplexer switch. This solution can switch two full PCI Ex - PCI Express 3.0 Performance, 8.0Gbps press 3.0 lanes to one of two locations. Using a unique design Pinout Optimized for Placement Between two PCIe Slots technique, Diodes is able to minimize the impedance of the Bidirectional Operation switch so that the attenuation observed through the switch is negligible. The unique design technique also offers a layout tar - Low Bit-to-Bit Skew, 10ps max geted for PCI Express signals, which minimizes the channel-to- Low Crosstalk: -48dB 4GHz channel skew as well as channel-to-channel crosstalk as required High Off Isolation: -22dB 4GHz by the PCI Express specicfi ation. Low Insertion Loss: -1.2dB 4GHz Return Loss: -15dB 4GHz V Operating Range: +3.3V DD Industrial Temperature Range: -40C to 85C Block Diagram ESD Tolerance: 1.5kV HBM Low Channel-to-Channel Skew, 20ps max + AOa + AI Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) AOa AI + BOa + BI Halogen and Antimony Free. Green Device (Note 3) BOa BI Packaging (Pb-free & Green): + AOb AOb 42-contact, TQFN (ZH42), 3.5mm 9mm + BOb BOb + + COa CI Application COa CI + + DOa DI Routing of PCI Express 3.0, DP1.2, USB3.0, SAS2.0, SATA3.0, DOa DI XAUI, RXAUI signals with low signal attenuation. + COb COb + DOb Truth Table DOb Function SEL xIy to xOay L SEL xIy to xOby H Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See A product Line of Diodes Incorporated PI3PCIE3415A Pin Configuration 42-TQFN (ZH) Top-Side View 42 41 40 39 GND 1 38 AI+ AI- 2 37 AOa+ 36 AOa- 3 AOb+ 4 35 GND AOb- VDD 5 34 BI+ BOa+ BI- 6 33 BOa- BOb+ 7 32 VDD 8 31 BOb- SEL 9 30 VDD GND GND 10 29 CI+ COa+ 11 28 CI- 12 27 COa- COb+ VDD COb- 13 26 GND DI+ 14 25 DOa+ DI- 15 24 23 DOa- DOb+ 16 GND 17 22 DOb- 18 19 20 21 Pin Descriptions Pin Pin Name Type Description Differential I/O pair from PCIE signal source. Signal is routed to the AOa+, AOa- pin 1, 2 AI+, AI- Differential I/O respectively when SEL=0. Signal is routed to the AOb+, AOb- pin respectively when SEL = 1. Differential analog pass-through I/O. 37, 36 AOa+, AOa- Differential I/O Signal from AI+ and AI- is routed to AOa+ and AOa- respectively when SEL=0. Differential analog pass-through I/O. 3, 4 AOb+, AOb- Differential I/O Signal from AI+ and AI- is routed to AOb+ and AOb- respectively when SEL=1. Differential I/O pair from PCIE signal source. 5, 6 BI+, BI- Differential I/O Signal is routed to the BOa+, BOa- pin respectively when SEL=0. Signal is routed to the BOb+, BOb- pin respectively when SEL = 1. Differential analog pass-through I/O. 33, 32 BOa+, BOa- Differential I/O Signal from BI+ and BI- is routed to BOa+ and BOa- respectively when SEL=0. Differential analog pass-through I/O. 7, 8 BOb+, BOb- Differential I/O Signal from BI+ and BI- is routed to BOb+ and BOb- respectively when SEL=1. Differential I/O pair from PCIE signal source. 10, 11 CI+, CI- Differential I/O Signal is routed to the COa+, COa- pin respectively When SEL=0. Signal is routed to the COb+, COb- pin respectively when SEL = 1. www.diodes.com May 2019 PI3PCIE3415A 2 Diodes Incorporated Document Number DS40126 Rev 3-2 GND GND V V DD DD GND GND V V DD DD