PI4IOE5V9539 2 16-bit I C-bus and SMBus low power I/O port with interrupt and reset Features Description Operation power supply voltage from 2.3V to 5.5V The PI4IOE5V9539 provide 16 bits of General 2 2 Purpose parallel Input/Output (GPIO) expansion for I C- 16-bit I C-bus GPIO with interrupt and reset bus/ SMBus applications. It includes the features such as 5V tolerant I/Os higher driving capability, 5V tolerance, lower power Polarity inversion register supply, individual I/O configuration, and smaller Active LOW interrupt output packaging. It provides a simple solution when additional I/O is needed for ACPI power switches, sensors, push Active LOW reset input buttons, LEDs, fans, etc. Low current consumption The PI4IOE5V9539 consists of two 8-bit registers to 0Hz to 400KHz clock frequency configure the I/Os as either inputs or outputs, and two 8- Noise filter on SCL/SDA inputs bit polarity registers to change the polarity of the input port register data. The data for each input or output is Power-on reset kept in the corresponding Input port or Output port ESD protection (4KV HBM and 1KV CDM) register. All registers can be read by the system master. Offered in two different packages: TSSOP-24 and The PI4IOE5V9539 open-drain interrupt output is TQFN 4x4-24 activated and indicate to the system when any input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. The RESET pin causes the same reset/default I/O input configuration to occur without de-powering the 2 device, holding the registers and I C-bus state machine in their default state until the RESET input is once again HIGH. 2 Two hardware pins (A0, A1) vary the fixed I C-bus address and allow up to four devices to share the same 2 I C-bus/SMBus. Pin Configuration Figure 1: TSSOP-24 ( Top View ) Figure 2: TQFN 4x4-24 ( Top View ) All trademarks are property of their respective owners. www.diodes.com 9/26/2016 2016-06-0005 PT0549-4 1 PI4IOE5V9539 Pin Description Table 1: Pin Description Pin Name Type Description TSSOP24 TQFN24 1 22 O Interrupt input (open-drain) INT 2 23 A1 I Address input 1 Active low reset pin. Driving this pin LOW causes: 3 24 I RESET PI4IOE5V9539 to reset its state machine and register. 4 1 IO0 0 I/O Port 0 input/output 0 5 2 IO0 1 I/O Port 0 input/output 1 6 3 IO0 2 I/O Port 0 input/output 2 7 4 IO0 3 I/O Port 0 input/output 3 8 5 IO0 4 I/O Port 0 input/output 4 9 6 IO0 5 I/O Port 0 input/output 5 10 7 IO0 6 I/O Port 0 input/output 6 11 8 IO0 7 I/O Port 0 input/output 7 12 9 GND G Ground 13 10 IO1 0 I/O Port 1 input/output 0 14 11 IO1 1 I/O Port 1 input/output 1 15 12 IO1 2 I/O Port 1 input/output 2 16 13 IO1 3 I/O Port 1 input/output 3 17 14 IO1 4 I/O Port 1 input/output 4 18 15 IO1 5 I/O Port 1 input/output 5 19 16 IO1 6 I/O Port 1 input/output 6 20 17 IO1 7 I/O Port 1 input/output 7 21 18 A0 I Address input 0 22 19 SCL I Serial clock line input 23 20 SDA I Serial data line open-drain 24 21 VCC P Supply voltage * I = Input O = Output P = Power G = Ground All trademarks are property of their respective owners. www.diodes.com 9/26/2016 2016-06-0005 PT0549-4 2