PT7M3808 Features Description Power-On Reset Generator with Adjustable Delay The PT7M3808G family of microprocessor supervisory Time: 1.25ms to 10s. circuits monitor system voltage form 0.4V to 5.0V, asserting Very Low Quiescent Current: 2.8A Typical an open-drain RESET signal when the SENSE voltage High Threshold Accuracy: 0.5% Typ. drops below a preset threshold or when the manual reset Fixed Threshold Voltages for Standard Voltage Rails from 0.9V to 5V and Adjustable Voltage Down to ( MR ) pin drops to a logic low. The RESET output 0.4V are available. remains low for the user-adjustable delay time after the Manual Reset ( MR ) Input. SENSE voltage and manual reset ( MR ) return above the Open-Drain RESET Output. respective thresholds. The PT7M3808G series use a precision reference to Temperature Range: -40C to +125C Package: TDFN2.0x2.0-6L and SOT23-6L achieve 0.5% threshold accuracy for VIT 3.3 V. The reset delay time can be set to 20ms by disconnecting the C pin, T Applications 300ms by connecting the C pin to V using a resister, or T DD can be user-adjusted between 1.25ms and 10s by connecting DSP or Microcontroller Applications capacitor. the C pin to an external capacitor. The PT7M3808 has a T Notebook/Desktop Computers PDAs/Hand-Held Products battery-powered very low typical quiescent current of 2.8uA so it is well- applications. suited to battery-powered applications. It is available in a Portable/Battery-Powered Products small SOT23 and an ultra-small 2.0x2.0 TDFN package, and FPGA/ASIC Applications is fully specified over a temperature range of -40C to +125C. Block Diagram Fixed Voltage Diagram Adjustable Voltage Diagram(PT7M3808G01) PT7M3808 Sept 2017 Document Number DS39989 Rev 1-2 Diodes Incorporated www.diodes.com All trademarks are property of their respective owners. 1 PT7M3808 Pin Configuration TDFN2.0x2.0-6L SOT23-6L Pin Description Pin No Pin Description SOT23 TDFN Name An open-drain output that is driven to a low impedance state when RESET is asserted. RESET will remain low (asserted) for the reset period after both SENSE is above V and MR is set to a 1 6 RESET IT logic high. A pull-up resistor from 10k to 1Mohm should be used on this pin, and allows the reset pin to attain voltages higher than V . DD 2 5 GND Ground. Driving the manual reset pin ( MR ) low asserts RESET . MR is internally tied to V by a DD 3 4 MR 90kohm pull-up resistor. Reset period programming pin. Connection this pin to VDD through a 40k to 200k resistor for 4 3 C 300ms or leaving it open results in fixed delay times 20ms. And connecting this pin with a cap T 100pF to ground a user-programmable delay time. This pin is connected to the voltage to be monitored. If the voltage at this terminal drops below the 5 2 SENSE threshold voltage VIT, then RESET is asserted. 6 1 V Supply Voltage. Place a 0.1uF ceramic capacitor close to this pin. DD Maximum Ratings Note: o o Storage Temperature ................................................................................... -65 C to +150 C Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the o o Operating Junction Temperature, T ........................................................ -40 C to +125 C J device. This is a stress rating only and functional Input Voltage Range, V ............................................................................... -0.3V to +7.0V DD operation of the device at these or any other condi- C Voltage Range, V ........................................................................... -0.3V to V +0.5V T CT DD tions above those indicated in the operational sec- Other Voltage Range, V , V , V ................................................ -0.3V to +7.0V RESET MR SENSE tions of this specification is not implied. Exposure RESET pin Current ............................................................................................................ 5mA to absolute maximum rating conditions for extended ESD rating, HBM .............................................................................. 2kV periods may affect reliability. ESD rating, CDM ............................................................................ 500V Recommended Operation Conditions Sym. Description Test Conditions Min. Typ. Max. Unit VDD Supply Voltage - 1.7 -- 6.5 V Input High Voltage MR - -- - VDD V V IH Input High Voltage for Open-drain RESET, SENSE 0 -- 6.5 V V Input Low Voltage MR. - - - 0.3VDD V IL T Operating Temperature - -40 - 125 C A PT7M3808 Sept 2017 Document Number DS39989 Rev 1-2 Diodes Incorporated www.diodes.com All trademarks are property of their respective owners. 2