S1613 Series 3.3V CMOS Low Jitter Crystal Clock Oscillator (XO) Actual Size = 5 x 7mm Pin Functions Packaging Outline Product Features Pin Function Less than 1.5 ps RMS jitter with non-PLL design 1 OE Function 3.3V CMOS/TTL compatible logic levels 2 Ground Pin-compatible with standard 5x7mm packages 3 Clock Output Designed for standard reflow and washing 7mm techniques 4 V DD Low power standby mode 5mm Pb-free and RoHS/Green compliant Product Description The S1613 Series is a 3.3V crystal clock oscillator Common Frequencies that achieves superb jitter and stability over a broad Contact SaRonix for additional frequencies range of operating conditions and frequencies. The output clock signal, generated internally with a non-PLL 1.5440 Mhz 24.5760 MHz 48.0000 MHz oscillator design, is compatible with LVCMOS/LVTTL 2.0480 MHz 25.0000 MHz 50.0000 MHz logic levels. The device, available on tape and reel, 3.6864 MHz 32.0000 MHz 60.0000 MHz is contained in a 5x7mm surface-mount ceramic 8.0000 MHz 32.7680 MHz 66.0000 MHz package. 10.0000 MHz 33.0000 MHz 66.6667 MHz 14.3181 MHz 34.3680 MHz 74.2500 MHz 16.0000 MHz 35.3280 MHz 75.0000 MHz Applications 16.3840 MHz 38.8800 MHz 77.7600 MHz The S1613 Series is an ideal reference clock for 18.4320 MHz 40.0000 MHz 80.0000 MHz applications requiring low jitter or tight stability, 19.4400 MHz 44.0000 MHz 90.0000 MHz including: 20.0000 MHz 44.7360 MHz 98.3040 MHz Ethernet FibreChannel Ordering Information Serial Attached SCSI (SAS) Server & Storage platforms SONET/SDH linecards T1/E1, T3/E3 linecards DSLAM 802.11a/b/g WiFi * Availability varies by frequency. ** Available up to 125 MHz Pericom Semiconductor Corporation 1-800-435-2336 S1613 Series 3.3V CMOS Low Jitter Crystal Clock Oscillator (XO) Electrical Performance Parameter Min. Typ. Max. Units Notes Output frequency 1.544 156.25 MHz As specified Supply voltage +2.97 +3.3 +3.63 V 15 1.544 to 32 MHz 25 >32 to 50 MHz Supply current, output enabled mA 40 >50 to 80 MHz 55 >80 to 156.25 MHz Supply current, standby mode 10 A Output Hi-Z Frequency stability 20 to 50 ppM See Note 1 below Operating temperature -40 +85 C As specified Output logic 0, VOL 10% V V DD Output logic 1, VOH 90% V V DD Output load 15 pF (max) or 10 LSTTL Duty cycle (1.544 to 80 MHz) 45 55 % -40 to +85C measured 50%VDD Duty cycle (>80 to 156.25 MHz) 45 55 % -10 to +70C measured 50%VDD -40 to-10C, +70 to +85C measured Duty cycle (>80 to 156.25 MHz) 40 60 % 50%VDD up to 50 MHz 7 >50 to 80 MHz 5 Rise and fall ns measured 20/80% of waveform time >80 to 125 MHz 3 >125 to 156.25 MHz 2 up to 80 MHz 1.5 10kHz to 20 MHz frequency band Jitter, ps RMS Phase (1-) >80 to 156.25 MHz 1 up to 80 MHz 5 20.000 adjacent periods Jitter, ps RMS Accumulated (1-) >80 to 156.25 MHz 3 up to 80 MHz 50 100.000 random periods Jitter, ps Total pk-pk >80 to 156.25 MHz 30 Notes: 1. As specified. Stability includes all combinations of operating temperature, load changes, rated input (supply) voltage changes, initial calibration tolerance (25C), aging (1 year at 25C average effective ambient temperature), shock and vibration. Output Enable / Disable Function Parameter Min. Typ. Max. Units Notes Input Voltage (pin 1), Output 2.2 V or open Enable Input voltage (pin 1), Output 0.8 V Output is Hi-Z Disable (low power standby) Internal pullup resistance 50 k Output disable delay 100 ns Output enable delay 10 ms Pericom Semiconductor Corporation 1-800-435-2336