SE555QS-13 Diodes Incorporated

SE555Q AUTOMOTIVE GRADE PRECISION TIMERS Description Pin Assignments SE555Q is precision timing circuit capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of (Top View) operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the GND 1 frequency and duty cycle can be controlled independently with two 8 V CC external resistors and a single external capacitor. TRIG 2 7 DISCH The threshold and trigger levels normally are two-thirds and one-third, OUT 3 6 THRES respectively, of V . These levels can be altered by use of the CC control-voltage terminal. When the trigger input falls below the trigger RESET 4 5 CONT level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the SO-8 threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset, and the output goes low. When the output is low, a low-impedance path is provided between discharge (DISCH) and ground. The output circuit is capable of sinking or sourcing current up to 200mA. Operation is specified for supplies of 5V to 15V. With a 5V supply, output levels are compatible with TTL inputs. Features Timing from Microseconds to Hours Astable or Monostable Operation Adjustable Duty Cycle TTL Compatible Output Can Source or Sink up to 200mA Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. Green Device (Note 3) The SE555Q is suitable for automotive applications requiring specific change control this part is AEC-Q100 qualified, PPAP capable, and manufactured in IATF 16949 certified facilities. SE555Q Pin Descriptions Pin Number Pin Name Description 1 GND Ground 2 TRIG Trigger set 1/3V CC 3 OUT Timer output 4 RESET Reset active low 5 CONT External adjustment of internal threshold and trigger voltages 6 THRES Threshold set to 2/3 V CC 7 DISCH Low impedance discharge path 8 V Chip supply voltage CC Functional Block Diagram V CONT RESET CC 5 8 4 R1 6 THRES 3 R2 O OUT S 2 TRIG 7 DISCH 1 GND RESET can override TRIG, which can override THRESH Functional Table Nominal Trigger Threshold Discharge RESET Output Voltage Voltage Switch Low Irrelevant Irrelevant Low On High <1/3V Irrelevant High Off CC High >1/3V >2/3V Low On CC CC High >1/3V <2/3V As previously established CC CC 2 of 14 May 2021 SE555Q Diodes Incorporated www.diodes.com Document number: DS39476 Rev. 2 - 2