EA DIP203B-4NLW Display Visions

Issue 4.2013 LCD MODULE 4x20 - 3.75mm INCL. CONTROLLER SSD1803 EA DIP203J-4NLW EA DIP203G-4NLED Dimension 68 x 27 mm EA DIP203B-4NLW Dimension 75 x 27 mm FEATURES * HIGH CONTRAST LCD SUPERTWIST DISPLAY * CONTROLLER SSD1803 (NEARLY 100% COMPATIBLE WITH HD44780) * INTERFACE FOR 4- AND 8-BIT DATA BUS * SERIAL SPI INTERFACE (SID, SOD, SCLK) * POWER SUPPLY +2.7 V ~ +3.45V / 1.5mA * LED BACKLIGHT Y/G max. 150mA +25C LED BACKLIGHT BLUE-WHITE AND BLACK-WHITE max. 45mA +25C * OPERATING TEMPERATURE RANGE -20..+70C * BUILT-IN TEMPERATURE COMPENSATION * SOME MORE MODULES WITH SAME SIZE AND SAME PINOUT: - DOTMATRIX 1x8, 2x16 - GRAPHIC 122x32 * NO SCREWS REQUIRED: SOLDER ONTO PCB ONLY * DETACHABLE VIA 9-PIN SOCKET EA B200-9 (2 PCS REQUIRED) ORDERING INFORMATION LCD MODULE 4x20 - 3.73mm WITH LED BACKLIGHT Y/G EA DIP203G-4NLED BLUE-WHITE EA DIP203B-4NLW BLACK-WHITE EA DIP203J-4NLW 9-PIN SOCKET, HEIGHT 4.3mm (1 PC.) EA B200-9 Zeppelinstr. 19 D-82205 Gilching Phone +49-(0)8105-778090 Fax +49-(0)8105-778099 www.lcd-module.de info lcd-module.deELECTRONIC ASSEMBLY reserves the right to change specifications EA DIP203-4 without prior notice. Printing and typographical errors reserved. Page 2 PINOUT Pin Symbo Level Function Pin Symbo Level Function 1 VSS L Power Supply 0V (GND) 10 D3 H / L Display Data 2 VDD H Power Supply +3.3V 11 D4 (D0) H / L Display Data 3 VEE - Contrast adjustment, input 12 D5 (D1) H / L Display Data 4 RS (CS) H / L H=Data, L=Command 13 D6 (D2) H / L Display Data R/W 5 H / L H=Read, L=Write 14 D7 (D3) H / L Display Data, MSB (SID) 6 E (SCLK) H Enable (falling edge) 15 - - NC (see EA DIP122-5N) 7 D0 (SOD) H / L Display Data, LSB 16 RES L Reset (internal Pullup 10k) 8 D1 H / L Display Data 17 A - LED B/L+ Resistor required 9 D2 H / L Display Data 18 C - LED B/L- BACKLIGHT Using the LED backlight requires a current source or external current-limiting resistor. Forward voltage for yellow/green backlight is 3.9~4.2V and for white LED backlight is 3.0~3.6V. Please take care of derating for T >+25C. a Note: Do never connect backlight directly to 5V this may destroy backlight immediately TABEL OF COMMAND (SSD1803, IE=HIGH) C ode Execute Instruction Description RE DB DB DB DB DB DB DB DB Time RS R/W Bit 7 6 5 4 3 2 1 0 (270kHz) Clears all display and returns the cursor to the Clear Display * 0 00 0 0 0 0 0 0 1 1.53ms home position (Address 0). Returns the Cursor to the home position (Address 0). Also returns the display being shifted to the Cursor At Home 0 0 00 0 0 0 0 0 1 * 1.53ms original position. DD RAM contents remain unchanged. Set Power down mode bit. Power Down 0 00 0 0 0 0 0 1 PD PD=0: powerdown mode disable 39s 1 Mode PD=1: powerdown mode enable Cursor moving direction (I/D=0: dec I/D=1: inc) 0 0 0 0 0 0 0 0 1 I/D S 39s shift enable bit (S=0: disable S=1: enable shift) Entry Mode Set Segment bidirectional function 1 0 0 0 0 0 0 0 1 1 BID 39s (BID=0: Seg1->Seg60 BID=1: Seg60->Seg1) D=0: display off D=1: display on Display On/Off 0 0 0 0 0 0 0 1 D C B C=0: cursor off C=1: cursor on 39s Control B=0: blink off B=1: blink on FW=0: 5-dot font width FW=1: 6-dot font width extended BW=0: normal cursor BW=1: inverting cursor 1 0 0 0 0 0 0 1 FW BW NW 39s Function Set NW=0: 1- or 2-line (see N) NW=1: 4-line display Moves the Cursor or shifts the display Cursor / Display S/C R/L S/C=0: cursor Shift S/C=1: display shift 0 0 0 0 0 0 1 * * 39s Shift R/L=0: shift to left R/L=1: shift to right Scroll Enable 1 0 0 0 0 0 1 H4 H3 H2 H1 Determine the line for horizontal scroll 39s sets interface data length (DL=0:4-bit DL=1:8-bit) number of display lines (N=0: 1-line N=1: 2-line) 0 0 0 0 0 1 DL N RE DH RE extension register (RE= 0/1) 39s scroll/shift (DH=0: dot scroll DH=1: display shift) Function Set reverse bit (REV=0:normal REV=1:inverse display) CG-/SEG-RAM blink (BE=0: disable BE=1: enable) 1 0 0 0 0 1 DL N RE BE LP 39s LP=0: normal mode LP=1: low power mode CG RAM Sets the CG RAM address. CG RAM data is sent 0 0 0 0 1 AC 39s and received after this setting. Address Set SEG RAM Sets the SEG RAM address. SEG RAM data is sent 1 0 0 0 1 * * AC 39s and received after this setting. Address Set DD RAM Sets the DD RAM address. DD RAM data is sent 0 01 AC 39s 0 and received after this setting. Address Set Set Scroll 0 01 * Sets the quantity of horizontal dot scroll (DH=0) 39s 1 SQ Quantity Reads Busy flag (BF) indicating internal operation is Busy Flag / 0 1BF AC being performed and reads address counter - * Address Read contents. Writes data into internal RAM Write Data * 1 0 Write Data 43s (DD RAM / CG RAM / SEGRAM) Reads data from internal RAM Read Data * 1 1 Read Data 43s (DD RAM / CG RAM / SEGRAM)