REVISIONS LTR DESCRIPTION DATE APPROVED A Add six new device types for vendor CAGE number 65786. Add 93-01-21 M. A. Frye vendor CAGE number 1FN41 as a source of supply for devices 01KX, 02KX, 03KX, and 04KX. Change to vendor similar part number for vendor CAGE number 1FN41. Change to margin test method A for vendor CAGE number 66579. Remove 4.5.1, 4.5.2, 4.5.3, figures 5 and 6, and table III from drawing. Change to parameters t and t in CS DF table I. Change to figures 2 and 3. Editorial changes throughout. B 5 year review and update. Changed input capacitance from 6 pF to 06-06-06 Raymond Monnin 10 pF. ksr THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PREPARED BY PMIC N/A DEFENSE SUPPLY CENTER COLUMBUS Kenneth Rice STANDARD COLUMBUS, OHIO 43218-3990 CHECKED BY MICROCIRCUIT 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-87515 01 J A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 8K x 8 UV EPROM 45 ns 02 8K x 8 UV EPROM 55 ns 03 8K x 8 UV EPROM 70 ns 04 8K x 8 UV EPROM 90 ns 05 8K x 8 UV EPROM 45 ns 06 8K x 8 UV EPROM 55 ns 07 8K x 8 UV EPROM 35 ns 08 8K x 8 UV EPROM 35 ns 09 8K x 8 UV EPROM 45 ns 10 8K x 8 UV EPROM 55 ns 11 8K x 8 UV EPROM 25 ns 12 8K x 8 UV EPROM 25 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 OR CDIP2-T24 24 Dual-in-line 2/ K GDFP2-F24 OR CDFP3-F24 24 Flat pack 2/ L GDIP3-T24 OR CDIP4-T24 24 Dual-in-line 2/ / 3 CQCC1-N28 28 Square leadless chip carrier 2 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Storage temperature ...........................................................-65C to +150C Voltages on any pin with respect to ground .........................-0.5 V dc to +7.0 V dc V with respect to ground...................................................-0.5 V dc to +14.0 V dc PP Maximum power dissipation (P ) 3/.....................................1 W D Lead temperature (soldering, 10 seconds) ..........................+300C Thermal resistance, junction-to-case ( )..........................MIL-STD-1835 JC Junction temperature (T ) 4/ ................................................+150C J 1.4 Recommended operating conditions. 1/ Case operating temperature (T ).........................................-55C to +125C C Supply voltage (V )............................................................+4.5 V dc to +5.5 V dc CC 1/ Generic numbers are listed on the Standardized Microcircuit Drawing Bulletin at the end of this document and will also be listed in MIL-HDBK-103. 2/ Lid shall be transparent to permit ultraviolet light erasure. 3/ Must withstand the added P due to short circuit test, e.g., I . D OS 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. SIZE STANDARD 5962-87515 MICROCIRCUIT DRAWING A REVISION LEVEL SHEET DEFENSE SUPPLY CENTER COLUMBUS B 2 COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97