E981.12A39BB Elmos

DUAL IO-LINK MASTER TRANSCEIVER WITH UARTs E981.12 PRODUCTION DATA - NOV 27, 2013 Features General Description 2-port IO-Link Master This device comes with two independently operating Integrated UART-Interface for each port IO-Link MASTER PHYs which make it a perfect fit for Output drivers with typical 1 2/4/8/16-port Master applications. Especially for multi- Supporting external PMOS switches for port applications the integrated UARTs offer you high IO-Link supply (L+) with current limitation efl xibility regarding scalability of Master ports and the Wake-up generation support choice of the C used for the application. As the E981.12 Supply voltage range allows the support of external MOSFETs for sensor sup- V : 8V 32V / V : 3.15V - 3.45V ply, it enables cost-effective and power dissipation op- VDDH VDD Over-current & short-circuit protection at output timized system concepts. stages with configurable thresholds Digital inputs configurable for IO-LINK or The dual IO-Link Master is also available as SIP at RENE- IEC 61131-2 compatible interface SAS with embedded microcontroller for protocol han- SPI for communication, configuration, dling. and diagnosis Under voltage monitor for all supplies Ordering Information Over temperature protection Ordering No.: Ambient Temp. Range Package E98112A39B -40C to +105C QFN44L7 Applications IO-Link Master application in modular SPS Gateway applications Typical Application Circuit VIN VDD VDDH External Voltage Supply Monitor L1 Regulator Overtemperature, L2 Overvoltage Protection GND e.g. R =100m INTN SHUNT Current SENSE L1 Amplifier SENSE L2 e.g. R =100m ON OC 1:2 SPI DR L1 NCS L+1 Gate Driver DR L2 SCLK System MOSI Control L+2 MISO RXD 1:2 CQ IN1 UARTs RXD1 CQ IN2 External RXD2 C ILIM 1:2 L+ 1:2 WAKE 1:2 TXD 1:2 CQ OUT1 CQ1 TXEN 1:2 TXEN1 CTRL CQ OUT2 CQ2 TXD1 TXEN2 TXD2 E981.12 PGND1 PGND2 GND Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Elmos Semiconductor AG Data Sheet QM-No.: 25DS0069E.02 1/34DUAL IO-LINK MASTER TRANSCEIVER WITH UARTs E981.12 PRODUCTION DATA - NOV 27, 2013 VIN Functional Diagram VDD VDDH External Voltage Supply Monitor L1 Regulator Overtemperature, L2 Overvoltage Protection GND e.g. R =100m INTN SHUNT Current SENSE L1 Amplifier SENSE L2 e.g. R =100m ON OC 1:2 SPI DR L1 NCS L+1 Gate Driver DR L2 SCLK System MOSI Control L+2 MISO RXD 1:2 CQ IN1 UARTs RXD1 CQ IN2 External RXD2 C ILIM 1:2 L+ 1:2 WAKE 1:2 TXD 1:2 CQ OUT1 CQ1 TXEN 1:2 CTRL TXEN1 CQ OUT2 CQ2 TXD1 TXEN2 TXD2 E981.12 GND PGND1 PGND2 Pin Configuration Bottom Side Top View Pin 1 44 43 42 41 40 39 38 37 36 35 34 SENSE L1 1 33 n.c. 2 32 DR L1 EP TXEN1 L1 3 31 RXD1 4 30 CQ OUT1 TXD1 5 CQ IN1 29 INTN PGND1 6 28 GND 7 27 PGND2 VDD E981.12 CQ IN2 8 26 RXD2 9 25 CQ OUT2 TXD2 10 L2 24 TXEN2 DR L2 11 23 n.c. 12 13 14 15 16 17 18 19 20 21 22 Not to scale Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Elmos Semiconductor AG Data Sheet QM-No.: 25DS0069E.02 2/34 SENSE L2 VDDH GND n.c. i.c. i.c. SCSN XTAL IN SCLK XTAL OUT MOSI GND MISO VDD GND CLK OUT VDD n.c. n.c. n.c. n.c. n.c.