X1G004491000412 Epson

Clock OSC SG7050CBN Product name SG7050CBN 133.330000MHz TJGA Product Number / Ordering code X1G0044910004xx Please refer to the 8.Packing information about xx (last 2 digits) Output waveform CMOS Pb free / Complies with EU RoHS directive Reference weight Typ. 147 mg 1.Absolute maximum ratings Parameter Symbol Min. Typ. Max. Unit Conditions / Remarks Maximum supply voltage Vcc-GND -0.3 - 5 V - Storage temperature T stg -40 - +125 C Storage as single product Input voltage Vin -0.3 - Vcc+0.3 V ST terminal 2.Specifications(characteristics) Parameter Symbol Min. Typ. Max. Unit Conditions / Remarks Output frequency f0 133.3300 MHz - Supply voltage Vcc 1.6 - 3.63 V Operating temperature - T use -40 - +85 C -6 Frequency tolerance T use f tol -50 - 50 x10 Current consumption No load condition Icc - - 11 mA Stand-by current I std - - 10.0 A ST = GND Disable current I dis - - - mA - 50% Vcc Level L CMOS=<15pF Symmetry SYM 45 - 55 % Output voltage V - Vcc-0.4 - - OH V - - - 0.4 OL Output load condition CMOS Load L CMOS - - 15 pF Input voltage V 0.8Vcc - - ST terminal IH V - - 0.2Vcc ST terminal IL Vcc1.6V : 0.2Vcc to 0.8Vcc Level, Rise time t - - 3 ns r L CMOS=15pF Vcc1.6V : 0.2Vcc to 0.8Vcc Level, Fall time tf - - 3 ns L CMOS=15pF t = 0 at 0.9Vcc Start-up time t str - - 5 ms t Deterministic Jitter Vcc=3.3V Jitter - 0 - ps DJ t Random Jitter Vcc=3.3V - 2.1 - ps RJ t (RMS of total distribution) Vcc=3.3V - 2.1 - ps RMS t Peak to Peak Vcc=3.3V - 17.8 - ps p-p - t - - - ps acc Phase jitter t Off set Frequency: 12kHz to 20MHz Vcc=3.3V - 0.3 - ps PJ Phase noise - L(f) - - - dBc/Hz dBc/Hz Off set 10Hz Vcc=3.3V - -57 - - -86 - dBc/Hz Off set 100Hz Vcc=3.3V - -115 - dBc/Hz Off set 1kHz Vcc=3.3V Off set 10kHz Vcc=3.3V - -128 - dBc/Hz Off set 100kHz Vcc=3.3V - -137 - dBc/Hz Off set 1MHz Vcc=3.3V - -146 - dBc/Hz -6 Frequency aging +25C first year f age -5 - 5 x10 - - - - 1 Pagetr tf 3.Timing chart VCC 80 %VCC 50 %VCC 20 %VCC GND tw t 4.Test circuit 1) Waveform observation swich ST VCC or OE by-pass capacitor supply Test Point OUT GND L CMOS 2) Current consumption swich ST VCC or OE A by-pass capacitor supply *Current consumption under the disable function should be OUT Test GND Point = GND. 3) Condition (1) Oscilloscope Band width should be minimum 5 times higher (wider) than measurement frequency. Probe earth should be placed closely from test point and lead length should be as short as possible * Recommendable to use miniature socket. (Dont use earth lead.) (2) L CMOS also includes probe capacitance. (3) By-pass capacitor (0.01 F to 0.1 F) is placed closely between VCC and GND. (4) Use the current meter whose internal impedance value is small. (5) Power supply Start up time (0 %VCC to 90 %VCC) of power source should be more than 150 s. Impedance of power supply should be as lowest as possible. 2 Page