AFBR-79EQDZ
40 Gigabit Ethernet & InfiniBand QSFP+ Pluggable,
Parallel Fiber-Optics Module
Data Sheet
Description Features
The Avago Technologies AFBR-79EQDZ is a Four-Channel, Compliant to the 40GBASE-SR4 and XLPPI Specification
Pluggable, Parallel, Fiber-Optic QSFP+ Transceiver for 40 per IEEE 802.3ba-2010 and supporting 40G-IB-QDR /
Gigabit Ethernet (40GbE) application. This transceiver is 20G-IB-DDR / 10G-IB-SDR applications
a high performance module for short-range multi-lane
Compliant to the industry standard SFF-8436 QSFP+
data communication and interconnect applications. It
Specification Revision 3.5
integrates four data lanes in each direction with 40 Gbps
Power Level 1: Max Power <1.5W
aggregate bandwidth. Each lane can operate at 10.3125
Gbps up to 100 m using OM3 fiber or 150 m using OM4 High port density: 21mm horizontal port pitch
fiber. These modules supports 4 x 10G InfiniBand (IB)
Operate at 10.3125 Gbps per channel with 64b/66b
quadruple data rate (40G-IB-QDR) application and is back-
encoded data for 40GbE application and at 10 Gbps
ward compatible to the 4 x 5G IB dual data rate (20G-IB-
with 8b/10b compatible encoded data for 40G-IB-QDR
DDR) and 4 x 2.5G IB single data rate (10G-IB-SDR) applica-
application
tions as well.
Links up to 100m using OM3 fiber and 150m using
These modules are designed to operate over multimode
OM4 fiber
fiber systems using a nominal wavelength of 850nm. The
Supports optical interoperability with 10GBASE-
electrical interface uses a 38 contact edge type connec-
SR modules per IEEE 802.3ae standard provided the
tor. The optical interface uses an 8 or 12 fiber MTP (MPO)
receiver overload of 10G modules sustains up to 2.4
connector. This module incorporates Avago Technolo-
dBm input optical power
gies proven integrated circuit and VCSEL technology to
0 to 70C case temperature operating range
provide reliable long life, high performance, and consis-
tent service.
Proven High Reliability 850 nm technology: Avago
VCSEL array transmitter and Avago PIN array receiver
Applications
Hot pluggable transceiver for servicing and ease of
40GbE and 40G-IB-QDR / 20G-IB-DDR / 10G-IB-SDR
installation
interconnects
Two Wire Serial (TWS) interface with maskable
Datacom/Telecom switch & router connections
interrupts for expanded functionality
Data aggregation and backplane applications
Utilizes a standard 12/8 lane optical fiber with MTP
(MPO) optical connector for high density and thin,
Proprietary protocol and density applications
light-weight cable management
Part Number Ordering Options
AFBR-79EQDZ 40GbE and 40G-IB-QDR/20G-IB-DDR/10G-
IB-SDR with full real-time digital diagnos-
tic monitoring
AFBR-79Q4EKZ* Evaluation Board
AFBR-79Q2EKZ** Evaluation Kit
* Includes GUI and User Guide
** Includes GUI, User Guide, i-Port and Power Supply
Patent - www.avagotech.com/patents WARNING
CAUTION! Viewing the laser output with certain optical instruments (for
example, eye loupes, magnifiers and microscopes) within a distance of
INVISIBLE LASER RADIATION
100 mm may pose an eye hazard.
DO NOT VIEW DIRECTLY
CAUTION! Use of controls or adjustments or performance of procedures
WITH OPTICAL INSTRUMENTS
other than those specified herein may result in hazardous radiation
CLASS 1M LASER PRODUCT exposure.
Note: Standard used for classification: EN 60825-1:2007
CLASS 1M LASER PRODUCT: INVISIBLE LASER RADIATION, DO NOT VIEW DIRECTLY WITH OPTICAL INSTRUMENTS
Transmitter Receiver
The optical transmitter portion of the transceiver (see The optical receiver portion of the transceiver (see
Figure 1) incorporates a 4-channel VCSEL (Vertical Cavity Figure 1) incorporates a 4-channel PIN photodiode array, a
Surface Emitting Laser) array, a 4-channel input buffer and 4-channel TIA array, a 4 channel output buffer, diagnostic
laser driver, diagnostic monitors, control and bias blocks. monitors, and control and bias blocks. The Rx Output
The transmitter is designed for EN 60825 and CDRH eye Buffer provides CML compatible differential outputs for
safety compliance; Class 1M out of the module. The Tx the high speed electrical interface presenting nominal sin-
Input Buffer provides CML compatible differential inputs gle-ended output impedances of 50 Ohms to AC ground
presenting a nominal differential input impedance of and 100 Ohms differentially that should be differentially
100 Ohms. AC coupling capacitors are located inside the terminated with 100 Ohms. AC coupling capacitors are
QSFP+ module and are not required on the host board. For located inside the QSFP+ module and are not required
module control and interrogation, the control interface on the host board. Diagnostic monitors for optical input
(LVTTL compatible) incorporates a Two Wire Serial (TWS) power are implemen-ted and results are available through
interface of clock and data signals. Diagnostic monitors the TWS interface.
for VCSEL bias, module temperature, and module power
Alarm and warning thresholds are established for the mon-
supply voltage are implemented and results are available
itored attributes. Flags are set and interrupts gene-rated
through the TWS interface.
when the attributes are outside the thresholds. Flags are
Alarm and warning thresholds are established for the also set and interrupts generated for loss of optical input
monitored attributes. Flags are set and interrupts gener- signal (LOS). All flags are latched and will remain set even
ated when the attributes are outside the thresholds. Flags if the condition initiating the flag clears and operation
are also set and interrupts generated for loss of input resumes. All interrupts can be masked and flags are reset
signal (LOS) and transmitter fault conditions. All flags are upon reading the appropriate flag register. The electrical
latched and will remain set even if the condition initiating output will squelch for loss of input signal (unless squelch
the latch clears and operation resumes. All interrupts can is disabled) and channel de-activation through TWS inter-
be masked and flags are reset by reading the appropriate face. Status and alarm/warning information are available
flag register. The optical output will squelch for loss of via the TWS interface. To reduce the need for polling, the
input signal unless squelch is disabled. Fault detection hardware interrupt signal is provided to inform hosts of an
or channel deactivation through the TWS interface will assertion of alarm, warning and/or LOS.
disable the channel. Status, alarm/warning and fault in-
formation are available via the TWS interface. To reduce
the need for polling, the hardware interrupt signal is pro-
vided to inform hosts of an assertion of alarm, warning,
LOS and/or Tx fault.
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