FUJITSU SEMICONDUCTOR DS07126276E DATA SHEET 8-bit Microcontrollers CMOS 2 F MC-8FX MB95260H/270H/280H Series MB95F262H/F262K/F263H/F263K/F264H/F264K MB95F272H/F272K/F273H/F273K/F274H/F274K MB95F282H/F282K/F283H/F283K/F284H/F284K DESCRIPTION MB95260H/270H/280H are series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers of these series contain a variety of peripheral resources. 2 Note: F MC is the abbreviation of FUJITSU Flexible Microcontroller. FEATURES 2 F MC-8FX CPU core Instruction set optimized for controllers Multiplication and division instructions 16-bit arithmetic operations Bit test branch instructions Bit manipulation instructions, etc. Clock (main OSC clock and sub-OSC clock are only available in MB95F262H/F262K/F263H/F263K/F264H/ F264K/F282H/F282K/F283H/F283K/F284H/F284K) Selectable main clock source Main OSC clock (up to 16.25 MHz, maximum machine clock frequency: 8.125 MHz) External clock (up to 32.5 MHz, maximum machine clock frequency: 16.25 MHz) Main CR clock (1/8/10 MHz 3%, maximum machine clock frequency: 10 MHz) Selectable subclock source Sub-OSC clock (32.768 kHz) External clock (32.768 kHz) Sub CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 200 kHz) Timer 8/16-bit composite timer Timebase timer Watch prescaler LIN-UART (MB95F262H/F262K/F263H/F263K/F264H/F264K/F282H/F282K/F283H/F283K/F284H/F284K) Full duplex double buffer Capable of clock-synchronized serial data transfer and clock-asynchronized serial data transfer (Continued) Copyright2008-2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2010.5MB95260H/270H/280H Series (Continued) External interrupt Interrupt by edge detection (rising edge, falling edge, and both edges can be selected) Can be used to wake up the device from different low power consumption (standby) modes 8/10-bit A/D converter 8-bit or 10-bit resolution can be selected. Low power consumption (standby) modes Stop mode Sleep mode Watch mode Timebase timer mode I/O port (Max: 17) (MB95F262K/F263K/F264K) General-purpose I/O ports (Max): CMOS I/O: 15, N-ch open drain: 2 I/O port (Max: 16) (MB95F262H/F263H/F264H) General-purpose I/O ports (Max): CMOS I/O: 15, N-ch open drain: 1 I/O port (Max: 5) (MB95F272K/F273K/F274K) General-purpose I/O ports (Max): CMOS I/O: 3, N-ch open drain: 2 I/O port (Max: 4) (MB95F272H/F273H/F274H) General-purpose I/O ports (Max): CMOS I/O: 3, N-ch open drain: 1 I/O port (Max: 13) (MB95F282K/F283K/F284K) General-purpose I/O ports (Max): CMOS I/O: 11, N-ch open drain: 2 I/O port (Max: 12) (MB95F282H/F283H/F284H) General-purpose I/O ports (Max): CMOS I/O: 11, N-ch open drain: 1 On-chip debug 1-wire serial control Serial writing supported (asynchronous mode) Hardware/software watchdog timer Built-in hardware watchdog timer Low-voltage detection reset circuit Built-in low-voltage detector Clock supervisor counter Built-in clock supervisor counter function Programmable port input voltage level CMOS input level / hysteresis input level Dual operation Flash memory The erase/write operation and the read operation can be executed in different banks (upper bank/lower bank) simultaneously. Flash memory security function Protects the content of the Flash memory 2 DS07126276E