FUJITSU SEMICONDUCTOR DS706-00007-1v0-E DATA SHEET TM TM 32-bit ARM Cortex -M3 based Microcontroller FM3 MB9B100 Series MB9BF104N/R, F105N/R, F106N/R DESCRIPTION The MB9B100 Series are a highly integrated 32-bit microcontroller that target for high-performance and cost-sensitive embedded control applications. The MB9B100 Series are based on the ARM Cortex-M3 Processor and on-chip Flash memory and SRAM, and peripheral functions, including Motor Control Timers, ADCs and Communication Interfaces (UART, 2 SIO, I C, LIN). Note: ARM and Cortex-M3 are the trademarks of ARM Limited in the EU and other countries. Copyright2010-2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.1 FUJITSU SEMICONDUCTOR CONFIDENTIAL r2.1 MB9B100 Series FEATURES 32-bit ARM Cortex-M3 Core Processor version: r2p0 Up to 80MHz Frequency Operation Memory Protection Unit (MPU): improve the reliability of an embedded system Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories Flash memory Up to 512 Kbyte Read cycle: 0wait-cycle up to 60MHz, 2wait-cycle* above *: Instruction pre-fetch buffer is included. So when CPU access continuously, it becomes 0wait-cycle Security function for code protection SRAM MB9B100 Series contain a total of up to 64Kbyte on-chip SRAM memories. This is composed of two independent SRAM for CPU and DMA Controller can process simultaneously. Up to 32 Kbyte SRAM for high-performance CPU Up to 32 Kbyte SRAM for CPU/DMA Controller External Bus Interface Supports SRAM, NOR& NAND Flash device Up to 8 chip selects 8/16-bit Data width Up to 25-bit Address bit Multi-function Serial Interface (Max. 8channels) 4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3) Operation mode is selectable from the followings for each channel. UART CSIO LIN 2 I C UART Full-duplex double buffer Selection with or without parity supported Built-in dedicated baud rate generator External clock available as a serial clock Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4) Various error detect functions available (parity errors, framing errors, and overrun errors) CSIO Full-duplex double buffer Built-in dedicated baud rate generator Overrun error detect function available 2 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL r2.1