FUJITSU SEMICONDUCTOR DS706-00031-0v01-E DATA SHEET TM TM 32-bit ARM Cortex -M3 based Microcontroller MB9BD10T Series MB9BFD16S/T, MB9BFD17S/T, MB9BFD18S/T DESCRIPTION The MB9BD10T Series are a highly integrated 32-bit microcontrollers dedicated for embedded controllers with high-performance and competitive cost. These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and has peripheral functions such as Motor Control Timers, ADCs, Cipher accelerator, and Communication 2 Interfaces (USB, CAN, UART, CSIO, I C, LIN, Ethernet-MAC). The products which are described in this data sheet are placed into TYPE2 product categories inFM3 MB9Axxx/MB9Bxxx SERIES PERIPHERAL MANUA. Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries. Copyright2012 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2012.2 FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.1 MB9BD10T Series FEATURES 32-bit ARM Cortex-M3 Core Processor version: r2p1 Up to 144MHz Frequency Operation Memory Protection Unit (MPU): improves the reliability of an embedded system Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories Flash memory Up to 1Mbyte Built-in Flash Accelerator System with 16Kbyte trace buffer memory The read access to Flash memory can be achieved without wait cycle up to operation frequency of 72MHz. Even at the operation frequency more than 72MHz, an equivalent access to Flash memory can be obtained by Flash Accelerator System. Security function for code protection SRAM This Series contain a total of up to 128Kbyte on-chip SRAM memories. This is composed of two independent SRAM (SRAM0, SRAM1) . SRAM0 is connected to I-code bus or D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. SRAM0 : Up to 64Kbyte SRAM1 : Up to 64Kbyte External Bus Interface Supports SRAM, NOR and NAND Flash device Up to 8 chip selects 8/16-bit Data width Up to 25-bit Address bit Supports Address/Data multiplex Supports external RDY input USB Interface (Max 2channels) USB interface is composed of Function and Host. USB function USB2.0 Full-Speed supported Max 6 EndPoint supported EndPoint 0 is control transfer EndPoint 1, 2 can be selected Bulk-transfer, Interrupt-transfer or Isochronous-transfer EndPoint 3 to 5 can be selected Bulk-transfer or Interrupt-transfer EndPoint 1 to 5 is comprised Double Buffer USB host USB2.0 Full/Low-speed supported Bulk-transfer, interrupt-transfer and Isochronous-transfer support USB Device connected/dis-connected automatically detect IN/OUT token handshake packet automatically Max 256-byte packet-length supported Wake-up function supported DS706-00031-0v01-E 2 FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.1