CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Data sheet acquired from Harris Semiconductor SCHS273E High-Speed CMOS Logic August 1997 - Revised September 2003 Triple 3-Input AND Gate Features Description Buffered Inputs The HC11 and HCT11 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL = 5V, Typical Propagation Delay: 8ns at V /Title CC gates with the low power consumption of standard CMOS o C = 15pF, T = 25 C L A (CD54 integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin Fanout (Over Temperature Range) HCT11 compatible with the standard LS logic family. - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads , - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads D74 C Ordering Information o o Wide Operating Temperature Range . . . -55 C to 125 C HC11, TEMP. RANGE CD74 Balanced Propagation Delay and Transition Times o PART NUMBER ( C) PACKAGE HCT11 Signicant Power Reduction Compared to LSTTL CD54HC11F3A -55 to 125 14 Ld CERDIP ) Logic ICs Sub- / CD54HCT11F3A -55 to 125 14 Ld CERDIP HC Types ject - 2V to 6V Operation CD74HC11E -55 to 125 14 Ld PDIP (High - High Noise Immunity: N = 30%, N = 30% of V IL IH CC CD74HC11M -55 to 125 14 Ld SOIC at V = 5V CC CD74HC11MT -55 to 125 14 Ld SOIC HCT Types - 4.5V to 5.5V Operation CD74HC11M96 -55 to 125 14 Ld SOIC - Direct LSTTL Input Logic Compatibility, CD74HCT11E -55 to 125 14 Ld PDIP V = 0.8V (Max), V = 2V (Min) IL IH - CMOS Input Compatibility, I 1 A at V , V CD74HCT11M -55 to 125 14 Ld SOIC l OL OH CD74HCT11MT -55 to 125 14 Ld SOIC CD74HCT11M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The sufx 96 denotes tape and reel. The sufx T denotes a small-quantity reel of 250. Pinout CD54HC11, CD54HCT11 (CERDIP) CD74HC11, CD74HCT11 (PDIP, SOIC) TOP VIEW 1A 1 14 V CC 1B 2 13 1C 2A 3 12 1Y 2B 4 11 3C 2C 5 10 3B 2Y 6 9 3A GND 7 8 3Y CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright 2003, Texas Instruments Incorporated 1CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Functional Diagram 14 1 V 1A CC 13 2 1B 1C 12 3 2A 1Y 11 4 2B 3C 10 5 2C 3B 6 9 2Y 3A 7 8 GND 3Y TRUTH TABLE INPUTS OUTPUT nA nB nC nY LLLL LL H L LHL L LH HL H LLL HLHL HH L L HHHH Logic Symbol nA nB nY nC 2