HT9200A/HT9200B DTMFGenerators Features Operating voltage: 2.0V~5.5V Low total harmonic distortion Serial mode for the HT9200A 3.58MHz crystal or ceramic resonator Serial/parallel mode for the HT9200B HT9200A: 8-pin DIP/SOP package HT9200B: 14-pin SOP package Low standby current General Description The HT9200A/B tone generators are designed for MCU HT9200B contains a selectable serial/parallel mode in- interfaces. They can be instructed by a MCU to gener- terface for various applications such as security sys- ate 16 dual tones and 8 single tones from the DTMF pin. tems, home automation, remote control through The HT9200A provides a serial mode whereas the telephone lines, communication systems, etc. Selection Table Function Operating OSC Interface Package Voltage Frequency Part No. HT9200A 2V~5.5V 3.58MHz Serial 8 DIP/SOP HT9200B 2V~5.5V 3.58MHz Serial/Parallel 14 SOP Block Diagram % % & ) ( Rev. 1.50 1 April 29, 2013HT9200A/HT9200B Pin Assignment + 1 ( % % ( 1 + & 1 - 2 ) , % % ) , * + 1 & - Pad Assignment Pad Coordinates Unit: m ( 1 Pad Pad XY XY No. No. 1 553.30 430.40 8 553.30 523.50 2 9 553.30 553.30 133.50 190.30 . ) / ) 0 3 553.30 328.50 10 553.30 4.70 ) % % 4 553.30 523.50 11 553.30 340.30 * & 5 12 374.90 523.50 220.10 523.50 1 6 25.10 523.50 13 279.30 523.50 ) , + - 7 308.10 523.50 2 Chip size: 1460 1470 ( m) * The IC substrate should be connected to VSS in the PCB layout artwork. Pin Description Internal Pin Name I/O Description Connection CMOS IN CE I Chip enable, active low Pull-high X2 O The system oscillator consists of an inverter, a bias resistor, and the required load capacitor on chip. Oscillator The oscillator function can be implemented by Connect a standard 3.579545MHz X1 I crystal to the X1 and X2 terminals. VSS Negative power suppl, ground NC No connection Data inputs for the parallel mode CMOS IN When the IC is operating in the serial mode, the data input terminals (D0~D3) are D0~D3 I Pull-high included with a pull-high resistor. When the IC is operating in the parallel mode, or Floating these pins become floating. Operation mode selection input S/P I CMOS IN S/P= H : Parallel mode S/P= L : Serial mode Data synchronous clock input for the serial mode CMOS IN When the IC is operating in the parallel mode, the input terminal (CLK) is included CLK I Pull-high with a pull-high resistor. When the IC is operating in the serial mode, this pin be- or Floating comes floating. Rev. 1.50 2 April 29, 2013