A80C188XL20 Intel

80C186XL/80C188XL 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS Y Y Low Power, Fully Static Versions of Completely Object Code Compatible 80C186/80C188 with Existing 8086/8088 Software and Has 10 Additional Instructions over Y Operation Modes: 8086/8088 Enhanced Mode Y DRAM Refresh Control Unit Speed Versions Available Power-Save Mode 25 MHz (80C186XL25/80C188XL25) Direct Interface to 80C187 20 MHz (80C186XL20/80C188XL20) (80C186XL Only) 12 MHz (80C186XL12/80C188XL12) Compatible Mode Y Direct Addressing Capability to NMOS 80186/80188 Pin-for-Pin 1 MByte Memory and 64 Kbyte I/O Replacement for Non-Numerics Y Available in 68-Pin: Applications Plastic Leaded Chip Carrier (PLCC) Y Integrated Feature Set Ceramic Pin Grid Array (PGA) Static, Modular CPU Ceramic Leadless Chip Carrier Clock Generator (JEDEC A Package) 2 Independent DMA Channels Y Available in 80-Pin: Programmable Interrupt Controller Quad Flat Pack (EIAJ) 3 Programmable 16-Bit Timers Shrink Quad Flat Pack (SGFP) Dynamic RAM Refresh Control Unit Programmable Memory and Y Available in Extended Temperature Peripheral Chip Select Logic b a Range ( 40Cto 85 C) Programmable Wait State Generator Local Bus Controller Power-Save Mode System-Level Testing Support (High Impedance Test Mode) The Intel 80C186XL is a Modular Core re-implementation of the 80C186 microprocessor. It offers higher speed and lower power consumption than the standard 80C186 but maintains 100% clock-for-clock functional com- patibility. Packaging and pinout are also identical. 272431-1 *Other brands and names are the property of their respective owners. Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel s Terms and Conditions of Sale for such products. Intel retains the right to make changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata. June, 2002 Order Number: 272431-005 COPYRIGHT INTEL CORPORATION, 200280C186XL/80C188XL 16-Bit High-Integration Embedded Processors CONTENTS PAGE CONTENTS PAGE INTRODUCTION 4 AC SPECIFICATIONS 24 Major Cycle Timings (Read Cycle) 24 80C186XL CORE ARCHITECTURE 4 Major Cycle Timings (Write Cycle) 26 80C186XL Clock Generator 4 Major Cycle Timings (Interrupt Bus Interface Unit 5 Acknowledge Cycle) 27 Software Halt Cycle Timings 28 80C186XL PERIPHERAL ARCHITECTURE 5 Clock Timings 29 Chip-Select/Ready Generation Logic 5 Ready, Peripheral and Queue Status Timings 30 DMA Unit 6 Reset and Hold/HLDA Timings 31 Timer/Counter Unit 6 Interrupt Control Unit 6 AC TIMING WAVEFORMS 36 Enhanced Mode Operation 6 AC CHARACTERISTICS 37 Queue-Status Mode 6 DRAM Refresh Control Unit 7 EXPLANATION OF THE AC SYMBOLS 39 Power-Save Control 7 Interface for 80C187 Math Coprocessor DERATING CURVES 40 (80C186XL Only) 7 80C186XL/80C188XL EXPRESS 41 ONCE Test Mode 7 80C186XL/80C188XL EXECUTION PACKAGE INFORMATION 8 TIMINGS 41 Pin Descriptions 8 INSTRUCTION SET SUMMARY 42 80C186XL/80C188XL Pinout Diagrams 16 REVISION HISTORY 48 ELECTRICAL SPECIFICATIONS 22 ERRATA 48 Absolute Maximum Ratings 22 PRODUCT IDENTIFICATION 48 DC SPECIFICATIONS 22 Power Supply Current 23 2