AN87C196JTWB Intel

87C196KD 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Automotive Y b a Y 40Cto 125 C Full Duplex Serial Port Y Y 32 Kbytes of On-Chip EPROM High Speed I/O Subsystem Y Y 232 Byte Register File 16-Bit Timer Y Y 768 Bytes of Additional RAM 16-Bit Up/Down Counter with Capture Y Y Register-to-Register Architecture 3 Pulse-Width-Modulated Outputs Y Y 28 Interrupt Sources/16 Vectors Four 16-Bit Software Timers Y Y Peripheral Transaction Server 8- or 10-Bit 8-Channel A/D Converter with Sample/Hold Y 1.75 ms 16 x 16 Multiply (16 MHz) Y HOLD/HLDA Bus Protocol Y 3.0 ms 32/16 Divide (16 MHz) Y OTP One-Time Programmable and Y Powerdown and Idle Modes QROM Versions Y Five 8-Bit I/O Ports Y Available in 12 MHz and 16 MHz Y 16-Bit Watchdog Timer Versions Y Dynamically Configurable 8-Bit or Y 16 MHz Operation 16-Bit Buswidth The 87C196KD 16-bit microcontroller is a high-performance member of the MCS 96 microcontroller family. The 87C196KD is an enhanced 8XC196KC device with 1000 bytes RAM, 16 MHz operation and 32 Kbytes of on-chip EPROM. Intel s CHMOS process provides a high-performance processor along with low power con- sumption. Four high-speed capture inputs are provided to record times when events occur. Six high-speed outputs are available for pulse or waveform generation. The high-speed output can also generate four software timers or start an A/D conversion. Events can be based on the timer or up/down counter. NOTICE: This datasheet contains information on products in full production. Specifications within this datasheet are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. MCS 96 is a registered trademark of Intel Corporation. *Other brands and names are the property of their respective owners. Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel s Terms and Conditions of Sale for such products. Intel retains the right to make changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata. COPYRIGHT INTEL CORPORATION, 1995 January 1995 Order Number: 272168-002AUTOMOTIVE 87C196KD 2721681 Figure 1. 87C196KD Block Diagram 2721682 Figure 2. The 87C196KD Family Nomenclature 87C196KD Enhanced Feature Set over the 87C196KC 1. The 87C196KD has twice the RAM and twice the EPROM of the 87C196KC. 2. The vertical windowing scheme has been extended to allow all 1000 bytes of register RAM to be windowed into the lower register file. 3. A CLKOUT disable bit has been added to the IOC3 SFR. This can be used to reduce noise in systems not requiring the CLKOUT signal. 2