DK-DEV-10CX220-A Intel

Intel Cyclone 10 GX FPGA Development Kit User Guide Subscribe UG-20105 2018.08.15 Send Feedback Latest document on the web: PDF HTMLContents Contents 1. Overview........................................................................................................................ 4 1.1. General Development Kit Description........................................................................4 1.2. Recommended Operating Conditions........................................................................ 6 1.3. Handling the Board................................................................................................6 2. Getting Started............................................................................................................... 7 2.1. Installing the Quartus Prime Software...................................................................... 7 2.2. Development Kit Package....................................................................................... 8 2.3. Installing the Intel FPGA Download Cable Driver........................................................ 8 3. Development Kit Setup................................................................................................. 10 3.1. Setting up the Development Kit............................................................................. 10 3.2. Default Switch and Jumper Settings....................................................................... 10 4. Development Kit Components....................................................................................... 12 4.1. Board Overview...................................................................................................12 4.2. Cyclone 10 GX FPGA............................................................................................ 15 4.3. MAX 10 System Controller.....................................................................................19 4.4. FPGA Configuration.............................................................................................. 21 4.5. Status and User I/O Elements................................................................................23 4.5.1. Switches.................................................................................................23 4.5.2. Pushbuttons............................................................................................24 4.5.3. LEDs...................................................................................................... 25 4.6. Clocks................................................................................................................26 4.7. Memory..............................................................................................................27 4.7.1. EMIF with DDR3.......................................................................................27 4.7.2. QSPI Flash..............................................................................................27 4.8. Power.................................................................................................................27 4.9. Transceivers Interfaces and Communication Ports.....................................................29 4.9.1. Transceiver Channels ...............................................................................29 4.9.2. PCIe Interface......................................................................................... 29 4.9.3. SFP+ Interface........................................................................................ 29 4.9.4. USB3.1 Type-C Interface...........................................................................30 4.9.5. FPGA Mezzanine Card (FMC) Interface........................................................ 32 4.9.6. 10/100/1000Base-T Ethernet Connector......................................................37 2 4.9.7. I C/PMBUS..............................................................................................38 5. Board Test System........................................................................................................ 40 5.1. Preparing the Board............................................................................................. 41 5.2. Running the Board Test System............................................................................. 42 5.3. Using the Board Test System.................................................................................42 5.3.1. The Configure Menu................................................................................. 42 5.3.2. The System Info Tab................................................................................ 43 5.3.3. The GPIO Tab.......................................................................................... 45 5.3.4. The EPCQ Tab..........................................................................................46 5.3.5. The XCVR Tab..........................................................................................47 5.3.6. The FMC Tab........................................................................................... 50 5.3.7. The DDR3 Tab......................................................................................... 53 Intel Cyclone 10 GX FPGA Development Kit User Guide 2