DK-DEV-1SMX-H-A Intel

Intel Stratix 10 MX FPGA Development Kit User Guide Online Version ID: 683867 Send Feedback Version: 2020.06.15 UG-20151Contents Contents 1. Overview........................................................................................................................ 4 1.1. General Development Kit Description........................................................................4 1.2. Recommended Operating Conditions........................................................................ 6 1.3. Handling the Development Kit................................................................................. 6 2. Getting Started............................................................................................................... 7 2.1. About the Intel Quartus Prime Software..................................................................7 2.2. Development Kit Package....................................................................................... 7 2.3. Installing the Intel FPGA Download Cable Driver........................................................ 8 3. Development Kit Setup................................................................................................. 10 3.1. Applying Power to the Development Kit...................................................................10 3.2. Default Switch and Jumper Settings....................................................................... 11 4. Development Kit Components....................................................................................... 13 4.1. Components Overview..........................................................................................14 4.2. Intel MAX 10 FPGA System Controller.....................................................................17 4.3. Intel MAX 10 FPGA Power Manager.........................................................................21 4.4. FPGA Configuration.............................................................................................. 25 4.5. Status and User I/O Elements................................................................................28 4.6. Interfaces and Ports.............................................................................................29 4.6.1. PCI Express.............................................................................................29 4.6.2. Memory Interface.................................................................................... 34 4.6.3. High Bandwidth Memory (HBM2)................................................................48 4.6.4. QSFP......................................................................................................50 2 4.6.5. I C.........................................................................................................52 4.6.6. Flash Memory..........................................................................................54 4.7. HiLo Daughter Cards............................................................................................ 55 4.7.1. DDR4..................................................................................................... 56 4.7.2. QDR-IV...................................................................................................56 4.8. Clocks................................................................................................................58 4.9. Power.................................................................................................................59 4.9.1. Power Guidelines..................................................................................... 60 4.9.2. Power Distribution System........................................................................ 61 4.9.3. Power Sequence...................................................................................... 62 4.9.4. Power Measurement.................................................................................63 4.9.5. Power Fast Discharging.............................................................................63 4.9.6. Thermal Limitations and Protection.............................................................64 4.9.7. Cooling Design........................................................................................ 64 4.9.8. Mechanical Information.............................................................................65 4.9.9. Top Cover Removal.................................................................................. 66 5. Board Test System........................................................................................................ 68 5.1. Preparing the Board............................................................................................. 69 5.2. Running the Board Test System............................................................................. 69 Before you begin...............................................................................................70 To run the BTS..................................................................................................70 5.3. Using the Board Test System.................................................................................70 Intel Stratix 10 MX FPGA Development Kit User Guide Send Feedback 2