DK-SI-1SGX-L-A Intel

Intel Stratix 10 GX Transceiver Signal Integrity Development Kit User Guide Online Version ID: 683206 Send Feedback Version: 2019.07.24 UG-20047Contents Contents 1. Overview........................................................................................................................ 4 1.1. General Board Description...................................................................................... 4 1.2. Recommended Operating Conditions........................................................................ 4 1.3. Handling the Development Board.............................................................................4 2. Getting Started............................................................................................................... 6 2.1. Installing the Quartus Prime software.......................................................................6 2.2. Installing the Development Board............................................................................ 6 2.3. Installing the Intel FPGA Download Cable Driver........................................................ 7 3. Development Board Setup.............................................................................................. 9 3.1. Setting up the Development Board...........................................................................9 3.2. Factory Default Switch and Jumper Settings............................................................ 10 4. Board Components........................................................................................................12 4.1. Board Overview...................................................................................................12 4.2. Intel Stratix 10 GX FPGA.......................................................................................16 4.3. MAX V CPLD System Controller..............................................................................22 4.4. FPGA Configuration.............................................................................................. 25 4.4.1. FPGA Programming over Embedded Intel FPGA Download Cable II..................25 4.4.2. FPGA Programming from Flash Memory.......................................................26 4.4.3. FPGA Programming over External Intel FPGA Download Cable II.....................28 4.5. Status Elements.................................................................................................. 29 4.6. Setup Elements................................................................................................... 30 4.7. User Input-Output Components............................................................................. 31 4.7.1. User-Defined Pushbuttons.........................................................................31 4.7.2. User-Defined DIP Switch...........................................................................32 4.7.3. User-Defined LEDs................................................................................... 32 4.7.4. Character LCD......................................................................................... 33 4.8. Clock Circuits...................................................................................................... 33 4.8.1. Transceiver Dedicated Clocks.....................................................................33 4.8.2. General-Purpose Clocks............................................................................ 34 4.8.3. Embedded Intel FPGA Download Cable II Clock............................................ 36 4.9. Transceiver Channels............................................................................................36 4.10. Communication Ports..........................................................................................39 4.11. Flash Memory....................................................................................................40 5. System Power...............................................................................................................44 5.1. Power Guidelines................................................................................................. 44 5.2. Power Supply...................................................................................................... 44 5.3. Power Management..............................................................................................45 5.4. Power Distribution System.................................................................................... 46 5.5. Thermal Limitations and Protection Guidelines......................................................... 48 6. Board Test System........................................................................................................ 49 6.1. Preparing the Board............................................................................................. 50 6.2. Running the Board Test System............................................................................. 50 6.3. Using the Board Test System.................................................................................51 6.3.1. The Configure Menu................................................................................. 51 Intel Stratix 10 GX Transceiver Signal Integrity Development Kit User Send Feedback Guide 2