EN6347QI 4A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor Description Features The EN6347QI is a Power System on a Chip Integrated Inductor, MOSFETS, Controller (PowerSoC) DC-DC converter. It integrates Minimal external components. MOSFET switches, small-signal circuits, compensation, and the inductor in an advanced Up to 4A Continuous Output Current 4mm x 7mm QFN package. Capability. The EN6347QI is specifically designed to meet 3 MHz operating frequency. Switching the precise voltage and fast transient frequency can be phase locked to an external requirements of present and future high- clock. performance, low-power processor, DSP, FPGA, High efficiency, up to 95%. memory boards and system level applications in distributed power architecture. The devices Wide input voltage range of 2.5V to 6.6V. advanced circuit techniques, ultra high switching Light Load Mode with programmable set frequency, and proprietary integrated inductor point. technology deliver high-quality, ultra compact, non-isolated DC-DC conversion. Output Enable pin and Power OK signal. The Enpirion solution significantly helps in Programmable soft-start time. system design and productivity by offering greatly Under Voltage Lockout, Over Current, Short simplified board design, layout and Circuit and Thermal Protection. manufacturing requirements. In addition, a reduction in the number of vendors required for RoHS compliant, MSL level 3, 260C reflow. the complete power solution helps to enable an Applications overall system cost savings. All Enpirion products are RoHS compliant and Point of load regulation for processors, DSPs, lead-free manufacturing environment compatible. FPGAs, and ASICs Noise sensitive applications such as A/V, RF RA 0402 Css 0402 and Gbit I/O RB 0402 CA 0402 Low voltage, distributed power architectures such as 0.8V, 1.0V, 1.2, 2.5V, 3.3V, 5V rails Blade servers, RAID storage systems, EN6347Q I LAN/SAN adapter cards, wireless base stations, industrial automation, test and Output Cap Input Cap measurement, embedded computing, 47uF/1 206 22uF/1 206 communications, and multi-function printers. Ripple sensitive applications Figure 1: Total Solution Footprint PWM mode 2 (Not to scale) Total Area 75 mm Beat frequency sensitive applications www.enpirion.com 05991 10/04/2011 Rev: B EN6347QI Pin Assignments (Top View) Figure 2: Typical Application Schematic (PWM mode) Ordering Information Temp Rating Part Number (C) Package Figure 3: Pinout Diagram (Top View) EN6347QI -40 to +85 38-pin QFN T&R NOTE: All pins must be soldered to PCB. EN6347QI3 -40 to +85 38-pin QFN T&R EN6347QI-E QFN Evaluation Board Pin Description PIN NAME FUNCTION NO CONNECT These pins are internally connected to the common switching node of the 1-2, 12, NC(SW) internal MOSFETs. They are not to be electrically connected to any external signal, ground, 34-38 or voltage. Failure to follow this guideline may result in damage to the device. 3-4, NO CONNECT These pins may be internally connected. Do not connect to each other or NC 22-25 to any other electrical signal. Failure to follow this guideline may result in device damage. Regulated converter output. Connect these pins to the load and place output capacitor 5-11 VOUT between these pins and PGND pins 13-15. Input/Output power ground. Connect these pins to the ground electrode of the input and 13-18 PGND output filter capacitors. See VOUT and PVIN pin descriptions for more details. Input power supply. Connect to input power supply. Decouple with input capacitor to 19-21 PVIN PGND pins 16-18. Dual function pin providing LLM Enable and External Clock Synchronization (see Application Section). At static Logic HIGH, device will allow automatic engagement of light 26 LLM/SYNC load mode. At static logic LOW, the device is forced into PWM only. A clocked input to this pin will synchronize the internal switching frequency to the external signal. If this pin is left floating, it will pull to a static logic high, enabling LLM. Input Enable. Applying logic high enables the output and initiates a soft-start. Applying 27 ENABLE logic low disables the output. Power OK is an open drain transistor used for power system state indication. POK is logic 28 POK high when VOUT is within -10% of VOUT nominal. Programmable LLM engage resistor to AGND allows for adjustment of load current at which 29 RLLM Light-Load Mode engages. Can be left open for PWM only operation. Soft-Start node. The soft-start capacitor is connected between this pin and AGND. The 30 SS value of this capacitor determines the startup time. External Feedback Input. The feedback loop is closed through this pin. A voltage divider at 31 VFB VOUT is used to set the output voltage. The midpoint of the divider is connected to VFB. A phase lead capacitor from this pin to VOUT is also required to stabilize the loop. 32 AGND Analog Ground. This is the controller ground return. Connect to a quiet ground. 33 AVIN Input power supply for the controller. Connect to input voltage at a quiet point. Device thermal pad to be connected to the system GND plane. See Layout 39 PGND Recommendations section. Enpirion 2011 all rights reserved, E&OE 2 www.enpirion.com 05991 10/04/2011 Rev: B EN6347QI