EN63A0QI 12A Synchronous Highly Integrated DC-DC Power SoC Description Features The EN63A0QI is a Power System on a Chip High efficiency, up to 96%. (PowerSoC) DC to DC converter in a 76 pin QFN Excellent ripple and EMI performance. module. It offers highly efficient performance along with a rich and proven feature set that facilitate ease Up to 12A continuous operating current. of use in systems that are sensitive to beat tones. 1.2 MHz operating frequency with ability to The switching frequency can be synchronized to an synchronize to an external clock source or serve external clock or other EN63A0QIs. Other features as the primary source. include precision Enable threshold, pre-bias monotonic start-up, and parallel operation. External programmable Frequency between 0.9MHz and 1.5MHz for application tuning. The EN63A0QI is specifically designed to meet the precise voltage and fast transient requirements of 2% Output Voltage Accuracy over line, load, temp present and future high-performance, low-power EN63A0QI is a member of a family of devices processor, DSP, FPGA, memory boards and system between 1A to 12A load capacity with small total level applications in distributed power architecture. 2 2 PCB footprints from 156mm and 227mm . The devices advanced circuit techniques, ultra high switching frequency, and proprietary integrated Precision Enable threshold for sequencing. inductor technology deliver high-quality, ultra Monotonic start-up with pre-bias. compact, non-isolated DC-DC conversion. Programmable soft-start time. Soft Shutdown. Master/slave configuration for parallel operation. Thermal shutdown, over current, short circuit, and under-voltage protection. RoHS compliant, MSL level 3, 260C reflow. Applications Point of load regulation for low-power processors, multi-core processors, communication processor, Figure 1: BOM layout of EN63A0QI solution for maximum DSPs, FPGAs, and ASICs 2 performance. Total Area 227 mm Low voltage, distributed power architectures with The Enpirion integrated inductor solution significantly 0.8, 1.0, 1.2, 2.5V, 3.3V, 5V or 6V rails helps to reduce noise. The complete power converter Blade servers, RAID storage cards, LAN/SAN solution enhances productivity by offering greatly adapter cards, wireless base stations, industrial simplified board design, layout and manufacturing automation, test and measurement, embedded requirements. All Enpirion products are RoHS computing, communications, and multi-function compliant and lead-free manufacturing environment printers compatible. High efficiency 12V intermediate bus architectures Ordering Information Beat frequency sensitive applications Temp Rating Ripple/Noise Sensitive Applications Part Number (C) Package EN63A0QI -40 to +85 76-pin QFN T&R EN63A0QI-E QFN Evaluation Board www.enpirion.com June 2011, Rev B1 EN63A0QI Datasheet Schematic Pin Assignments (Top View) 56 S IN 1 NC 55 BGND NC 2 Thermal Pad 54 VDDB 3 NC 53 NC NC 4 52 NC 5 NC 77 51 PVIN NC 6 PGND 50 7 PVIN NC 49 PVIN NC 8 48 PVIN NC 9 EN63A0QI 47 NC 10 PVIN 11 46 PVIN NC NC 12 45 PVIN 13 44 NC PVIN NC 14 43 PVIN NC 15 42 PVIN NC 16 41 PVIN 17 NC 40 PVIN 18 NC PVIN 39 Figure 2: Simple Application Schematic for maximum performance. Unless otherwise specified, all passive components can be 0402 or smaller. Figure 3: Pin Out Diagram (Top View) NOTE: All pins must be soldered to PCB. Pin Description PIN NAME FUNCTION 1-19, 29, NC NO CONNECT: These pins must be soldered to PCB but not be electrically connected 52-53, 72- to each other or to any external signal, voltage, or ground. These pins may be 76 connected internally. Failure to follow this guideline may result in device damage. 20-28 VOUT Regulated converter output. Connect to the load, and place output filter capacitor(s) between these pins and PGND pins 28-31. NC(SW) NO CONNECT: These pins are internally connected to the common switching node of 30-31, 70- the internal MOSFETs. They must be soldered to PCB but not be electrically connected 71 to any external signal, ground, or voltage. Failure to follow this guideline may result in device damage. 32-38 PGND Input/Output power ground. Connect these pins to the ground electrode of the input and output filter capacitors. See VOUT and PVIN descriptions for more details. 39-51 PVIN Input power supply. Connect to input power supply, place input filter capacitor(s) between these pins and PGND pins 32-34. 54 VDDB Internal regulated voltage used for the internal control circuitry. Decouple with a 0.1uF capacitor to BGND for improved efficiency. 55 BGND See pin 54 description. 56 S IN Digital Input. Depending on the M/S pin, this pin accepts either an input clock to phase lock the internal switching frequency or a S OUT signal from another EN63A0QI. Leave this pin floating if it is not used. 57 S OUT Digital Output. Depending on the M/S pin, either a clock signal synchronous with the internal switching frequency or the PWM signal is output on this pin. Leave this pin floating if it is not used. 58 POK POK is a logic high when VOUT is within -10% to +20% of the programmed output voltage. This pin has an internal pull-up resistor to AVIN with a nominal value of 94K ohms. This pin can sink a maximum 4mA. 59 ENABLE This is the Device Enable pin. Floating this pin or a high level enables the device while a low level disables the device. A voltage ramp from another power converter may be applied for precision Enable. 60 AVIN Analog input voltage for the controller circuits. Connect this pin to the input power supply (PVIN) through a 1 ohm resistor. Can also be connected to an auxiliary supply within a voltage range that is sequencing. Enpirion 2011 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 2