Package Information Datasheet for Mature Altera Devices DS-PKG-16.8 This datasheet provides package and thermal resistance information for mature Altera devices.Packageinformationincludestheorderingcodereference,package acronym, leadframe material, lead finish (plating), JEDEC outline reference, lead coplanarity, weight, moisture sensitivity level, and other special information. The thermal resistance information includes device pin count, package name, and resistance values. This datasheet includes the following sections: Device and Package Cross Reference on page 1 Thermal Resistance on page 23 Package Outlines on page 44 f FormorepackageandthermalresistanceinformationaboutAlteradevicesthatare notlistedinthisdatasheet,refertothePackageandThermalResistancepageofthe Altera website. f For information about trays, tubes, and dry packs, refer to AN 71: Guidelines for Handling J-Lead, QFP, and BGA Devices. f RoHS-compliantdevicesarecompatiblewithleaded-reflowtemperatures.Formore information, refer to Alteras RoHS-Compliant Devices literature page. Device and Package Cross Reference Table 2throughTable 22liststhedevice,packagetype,andnumberofpinsforeach Altera device listed in this datasheet. Altera devices listed in this datasheet are available in the following packages: Ball-Grid Array (BGA) Ceramic Pin-Grid Array (PGA) FineLine BGA (FBGA) Hybrid FineLine BGA (HBGA) Plastic Dual In-Line Package (PDIP) Plastic Enhanced Quad Flat Pack (EQFP) Plastic J-Lead Chip Carrier (PLCC) Plastic Quad Flat Pack (PQFP) Power Quad Flat Pack (RQFP) Thin Quad Flat Pack (TQFP) Ultra FineLine BGA (UBGA) December 2011 Altera Corporation Package Information Datasheet for Mature Altera Devices2 Package Information Datasheet for Mature Altera Devices Device and Package Cross Reference Table 1 lists the Altera devices and the associated table locations. Table 1. Mature Altera Device and Package Cross Reference Altera Device Table locations Arria series FPGAs Arria GX Devices: Table 2 on page 3 Stratix II Devices: Table 3 on page 3 Stratix series FPGAs Stratix Devices: Table 4 on page 5 Cyclone II Devices: Table 5 on page 7 Cyclone series FPGAs Cyclone Devices: Table 6 on page 8 MAX 9000 Devices: Table 7 on page 8 MAX series CPLDs MAX 7000 Devices: Table 8 on page 9 MAX 3000A Devices: Table 9 on page 10 HardCopy II Devices: Table 10 on page 11 HardCopy series ASICs HardCopy Devices: Table 11 on page 11 HardCopy APEX Devices: Table 12 on page 12 APEX II Devices: Table 13 on page 13 APEX 20KE Devices: Table 14 on page 13 APEX series FPGAs APEX 20KC Devices: Table 15 on page 15 APEX 20K Devices: Table 16 on page 15 ACEX 1K FPGAs ACEX1K Devices: Table 17 on page 16 Mercury FPGAs Mercury Devices: Table 18 on page 17 FLEX 10KA Devices: Table 19 on page 17 FLEX series FPGAs FLEX 10KS Devices: Table 20 on page 18 FLEX 10KE Devices: Table 21 on page 18 Excalibur FPGAs Excalibur Devices: Table 22 on page 21 Configuration devices Configuration Devices: Table 23 on page 22 Enhanced configuration devices Enhanced Configuration Devices: Table 24 on page 22 Package Information Datasheet for Mature Altera Devices December 2011 Altera Corporation