80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Pin Compatible with 80960SB Architecture Built-in Interrupt Controller 20 MIPS* Burst Execution at 20 MHz 4 Direct Interrupt Pins 7.5 MIPS Sustained Execution 31 Priority Levels, 256 Vectors at 20 MHz Easy to Use, High Bandwidth 16-Bit Bus 512-Byte On-Chip Instruction Cache 32 Mbytes/s Burst Direct Mapped Up to 16 Bytes Transferred per Burst Parallel Load/Decode for Uncached 32-Bit Address Space, 4 Gigabytes Instructions Multiple Register Sets 80-Lead Quad Flat Pack (EIAJ QFP) Sixteen Global 32-Bit Registers 84-Lead Plastic Leaded Chip Carrier Sixteen Local 32-Bit Registers (PLCC) Four Local Register Sets Stored Software Compatible with On-Chip 80960KA/KB/CA/CF Processors Register Scoreboarding The 80960SA is a member of Intels i960 32-bit processor family, which is designed especially for low cost embedded applications. It includes a 512-byte instruction cache and a built-in interrupt controller. The 80960SA has a large register set, multiple parallel execution units and a 16-bit burst bus. Using advanced RISC technology, this high performance processor is capable of execution rates in excess of 7.5 million instructions * per second . The 80960SA is well-suited for a wide range of cost sensitive embedded applications including non-impact printers, network adapters and I/O controllers. 64- BY 32-BIT 32-BIT SIXTEEN LOCAL INSTRUCTION 32-BIT GLOBAL REGISTER EXECUTION REGISTERS CACHE UNIT 32-BIT BUS CONTROL 512-BYTE MICRO- MICRO- LOGIC 32-BIT INSTRUCTION INSTRUCTION INSTRUCTION INSTRUCTION INSTRUCTION ADDRESS FETCH UNIT DECODER CACHE SEQUENCER ROM 16-BIT BURST BUS Figure 1. The 80960SA Processors Highly Parallel Architecture * Relative to Digital Equipment Corporations VAX-11/780 at 1 MIPS (VAX-11 is a trademark of Digital Equipment Corporation) Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel. INTEL CORPORATION, 2004 August 2004 Order Number: 272206-00380960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS CONTENTS PAGE 1.0 THE i960 PROCESSOR ...........................................................................................................................1 1.1 Key Performance Features .................................................................................................................2 1.1.1 Memory Space And Addressing Modes ...................................................................................4 1.1.2 Data Types ...............................................................................................................................4 1.1.3 Large Register Set ...................................................................................................................4 1.1.4 Multiple Register Sets ..............................................................................................................5 1.1.5 Instruction Cache .....................................................................................................................6 1.1.6 Register Scoreboarding ...........................................................................................................6 1.1.7 High Bandwidth Bus ................................................................................................................6 1.1.8 Interrupt Handling ....................................................................................................................6 1.1.9 Debug Features .......................................................................................................................6 1.1.10 Fault Detection .......................................................................................................................7 1.1.11 Built-in Testability ....................................................................................................................7 1.1.12 CHMOS ..................................................................................................................................7 2.0 ELECTRICAL SPECIFICATIONS............................................................................................................. 11 2.1 Power and Grounding ....................................................................................................................... 11 2.2 Power Decoupling Recommendations .............................................................................................. 11 2.3 Connection Recommendations ......................................................................................................... 11 2.4 Characteristic Curves ....................................................................................................................... 11 2.5 Test Load Circuit ...............................................................................................................................13 2.6 ABSOLUTE MAXIMUM RATINGS* ..................................................................................................14 2.7 DC Characteristics ............................................................................................................................14 2.8 AC Specifications ..............................................................................................................................15 3.0 MECHANICAL DATA................................................................................................................................21 3.1 Packaging ......................................................................................................................................... 21 3.2 Pin Assignment ................................................................................................................................. 21 3.3 Pinout ................................................................................................................................................ 23 3.4 Package Thermal Specifications ......................................................................................................27 3.5 Stepping Register Information ..........................................................................................................27 4.0 WAVEFORMS ........................................................................................................................................... 28 5.0 REVISION HISTORY ................................................................................................................................34 ii