IS31FL3745 188 DOTS MATRIX LED DRIVER October 2018 GENERAL DESCRIPTION FEATURES The IS31FL3745 is a general purpose 18n (n=1~8) Supply voltage range: 2.7V to 5.5V LED Matrix programmed via 1MHz I2C compatible 18 Current sink (Maximum) interface. Each LED can be dimmed individually with Support 18 n (n=1~8) LED matrix configurations 8-bit PWM data and 8-bit DC scaling data which Individual 256 PWM control steps allowing 256 steps of linear PWM dimming and 256 Individual 256 DC current steps steps of DC current adjustable level. Global 256 current setting Additionally each LED open and short state can be SDB rising edge reset I2C module detected, IS31FL3745 store the open or short Programmable H/L logic:1.4/0.4, 2.4/0.6 information in Open-Short Registers. The Open-Short 29kHz PWM frequency Registers allowing MCU to read out via I2C compatible interface. Inform MCU whether there are 1MHz I2C-compatible interface LEDs open or short and the locations of open or short State lookup registers LEDs. Individual open and short error detect function The IS31FL3745 operates from 2.7V to 5.5V and 180 degree phase delay operation to reduce power noise features a very low shutdown and operational current. De-Ghost IS31FL3745 is available in WLCSP-36 Cascade for synchronization of chips (2.93mm2.93mm, 0.5mm ball pitch, 0.25mm ball WLCSP-36 (2.93mm2.93mm, 0.5mm ball pitch, diameter) package. It operates from 2.7V to 5.5V over the temperature range of -40C to +125C. 0.25mm ball diameter) package APPLICATIONS AI-speakers and smart home devices LED display for hand-held devices TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit: 48 RGBs Lumissil Microsystems www.lumissil.com 1 Rev. A, 10/08/2018 IS31FL3745 Figure 2 Typical Application Circuit (Eight Parts Synchronization-Work) Note 1: IC should be placed far away from the antenna in order to prevent the EMI. Note 2: The 20R between LED and IC is only for thermal reduction, for mono red LED, if PV =V =3.3V, dont need these resistors. CC CC Note 3: The VIH of I2C bus should be smaller than VCC. And if VIH is lower than 3.0V, it is recommended add a level shift circuit to avoid extra shutdown current. Note 4: One system should contain only one master, all slave parts should be configured as slave mode before the master is configured as master mode. Work as master mode or slave mode specified by Configuration Register (SYNC bits, register 25h, Page 2). Master part output master clock, and all the other parts which work as slave input this master clock. Lumissil Microsystems www.lumissil.com 2 Rev. A, 10/08/2018