Memory Module Speci cations KVR16LR11D8K3/24I 24GB (8GB 2Rx8 1G x 72-Bit x 3 pcs.) PC3L-12800 CL11 Registered w/Parity 240-Pin DIMM Kit DESCRIPTION SPECIFICATIONS ValueRAM s KVR16LR11D8K3/24I is a kit of three 1G x 72-bit CL(IDD) 11 cycles (8GB) DDR3L-1600 CL11 SDRAM (Synchronous DRAM), low Row Cycle Time (tRCmin) 48.125ns (min.) voltage, registered w/parity, 2Rx8 ECC, Intel Compatibility Refresh to Active/Refresh 260ns (min.) Tested, memory modules, based on eighteen 512M x 8-bit Command Time (tRFCmin) FBGA components per module. Total kit capacity is 24GB. The Row Active Time (tRASmin) 35ns (min.) SPDs are programmed to JEDEC standard latency DDR3-1600 Maximum Operating Power ( 1.35V) TBD W* (per module) timing of 11-11-11 at 1.35V and 1.5V. Each 240-pin DIMM uses UL Rating 94 V - 0 gold contact fingers. The electrical and mechanical specifica- o o Operating Temperature 0 C to 85 C tions are as follows: o o Storage Temperature -55 C to +100 C FEATURES *Power will vary depending on the SDRAM and Register/PLL used. JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) Power Supply VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) 800MHz fCK for 1600Mb/sec/pin 8 independent internal bank Programmable CAS Latency: 11, 10, 9, 8, 7, 6 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch Burst Length: 8 (Interleave without any limit, sequential with starting address 000 only), 4 with tCCD = 4 which does not allow seamless read or write either on the fly using A12 or MRS Bi-directional Differential Data Strobe Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm 1%) On Die Termination using ODT pin On-DIMM thermal sensor (Grade B) Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95C Asynchronous Reset PCB : Height 1.180 (30.00mm), double sided component Continued >> Document No. VALUERAM1428-001.A00 04/22/14 Page 1MODULE DIMENSIONS: Document No. VALUERAM1428-001.A00 Page 2