Memory Module Speci cations KVR16R11S8/4 4GB 1Rx8 512M x 72-Bit PC3-12800 CL11 Registered w/Parity 240-Pin DIMM DESCRIPTION SPECIFICATIONS This document describes ValueRAM s 512M x 72-bit (4GB) CL(IDD) 11 cycles DDR3-1600 CL11 SDRAM (Synchronous DRAM), registered w/ Row Cycle Time (tRCmin) 48.125ns (min.) parity, 1Rx8 ECC, memory module, based on nine 512M x 8-bit Refresh to Active/Refresh 260ns (min.) FBGA components. The SPD is programmed to JEDEC stan- Command Time (tRFCmin) dard latency DDR3-1600 timing of 11-11-11 at 1.5V. This 240- Row Active Time (tRASmin) 35ns (min.) pin DIMM uses gold contact fingers. The electrical and me- Maximum Operating Power 2.814 W* chanical specifications are as follows: UL Rating 94 V - 0 o o Operating Temperature 0 C to 85 C o o Storage Temperature -55 C to +100 C FEATURES *Power will vary depending on the SDRAM and JEDEC standard 1.5V (1.425V ~1.575V) Power Supply Register/PLL used. VDDQ = 1.5V (1.425V ~ 1.575V) 800MHz fCK for 1600Mb/sec/pin 8 independent internal bank Programmable CAS Latency: 11, 10, 9, 8, 7, 6 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch Burst Length: 8 (Interleave without any limit, sequential with starting address 000 only), 4 with tCCD = 4 which does not allow seamless read or write either on the fly using A12 or MRS Bi-directional Differential Data Strobe Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm 1%) On Die Termination using ODT pin On-DIMM thermal sensor (Grade B) Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95C Asynchronous Reset PCB : Height 1.180 (30.00mm), double sided component Continued >> Document No. VALUERAM1331-001.B00 11/20/13 Page 1MODULE DIMENSIONS: Document No. VALUERAM1331-001.B00 Page 2