Surface Mount MLC Capacitors MLCC Standard MLCC Ranges Electrical Details A range of dc rated multi-layer chip capacitors from Capacitance Range 0.47pF to 22F 0.47pF to 22F and in case sizes 0603 to 8060 in C0G/NP0 0 30ppm/C Temperature Coefficient of C0G/NP0 and X7R dielectrics. Suitable for all general Capacitance (TCC) X7R 15% from -55C to +125C purpose and high reliability applications where package size and reliability are important. All are manufactured Cr > 50pF 0.0015 using Syfers unique wet process and incorporate C0G/NP0 Dissipation Factor Cr 50pF = 0.0015(15Cr+0.7) precious metal electrodes. X7R 0.025 Insulation Resistance (IR) 100G or 1000secs (whichever is the less) Voltage applied for 5 1 seconds, 50mA Dielectric Withstand Voltage (DWV) charging current maximum C0G/NP0 Zero Ageing Rate X7R <2% per time decade Range Dimensions Standard MLCC Ranges Termination Band Length Width Max. Thickness (L2) Size (L1) (W) (T) mm/inches mm/inches mm/inches mm/inches min max 1.6 0.2 0.8 0.2 0.8 0.10 0.40 0603 0.063 0.008 0.031 0.008 0.013 0.004 0.015 2.0 0.3 1.25 0.2 1.3 0.13 0.75 0805 0.08 0.012 0.05 0.008 0.051 0.005 0.03 3.2 0.3 1.6 0.2 1.6 0.25 0.75 1206 0.126 0.012 0.063 0.008 0.063 0.01 0.03 3.2 0.3 2.5 0.3 2.0 0.25 0.75 1210 0.126 0.012 0.1 0.012 0.08 0.01 0.03 4.5 0.35 2.0 0.3 2.0 0.25 1.0 1808 0.18 0.014 0.08 0.012 0.08 0.01 0.04 4.5 0.35 3.2 0.3 2.5 0.25 1.0 1812 0.18 0.014 0.126 0.012 0.1 0.01 0.04 4.5 0.35 6.30 0.4 2.5 0.25 1.0 1825 0.18 0.014 0.25 0.016 0.1 0.01 0.04 5.7 0.4 5.0 0.4 4.2 0.25 1.0 2220 0.225 0.016 0.197 0.016 0.16 0.01 0.04 5.7 0.4 6.3 0.4 4.2 0.25 1.0 2225 0.225 0.016 0.25 0.016 0.16 0.01 0.04 9.2 0.5 10.16 0.5 2.5 0.5 1.5 3640 0.36 0.02 0.4 0.02 0.1 0.02 0.06 14.0 0.5 12.7 0.5 4.2 0.5 1.5 5550 0.55 0.02 0.5 0.02 0.16 0.02 0.06 20.3 0.5 15.24 0.5 2.5 0.5 1.5 8060 0.8 0.02 0.6 0.02 0.1 0.02 0.06 Custom chip sizes not included in the table, but larger than 2225, can be considered with minimum tooling charges. Please refer specific requests direct to the sales office. Max thickness relates to standard components and actual thickness may be considerably less. Thicker parts, or components with reduced maximum thickness, can be considered by request please refer requests to the sales office. Ordering Information Standard MLCC Range 1210 Y 100 0103 J X T Voltage d.c. Capacitance in Pico Capacitance Dielectric Chip Size Termination Packaging Suffix Code (marking code) farads (pF) Tolerance Codes TM 0603 Y = FlexiCap 010 = 10V <1.0pF H: 0.05pF C = C0G/NP0 T = 178mm Used for specific termination base with 016 = 16V (7) reel customer Insert a P for the decimal (1B) (only available for 0805 nickel barrier (100% 025 = 25V requirements point as the first character. values <4.7pF) R = 330mm matte tin plating). 050 = 50V X = X7R e.g., P300 = 0.3pF 1206 <10pF (13) reel RoHS compliant. 063 = 63V (2R1) Values in 0.1pF steps 100 = 100V B: 0.10pF 1210 TM B = Bulk pack H = FlexiCap 200 = 200V P = X5R C: 0.25pF 1.0pF & <10pF tubs or trays termination base with 250 = 250V 1808 D: 0.5pF nickel barrier (tin/lead Insert a P for the decimal 500 = 500V plating with min. 10% point as the second F: 1.0pF 630 = 630V 1812 lead). 1K0 = 1kV character. Not RoHS compliant. 10pF 1825 1K2 =1.2kV e.g., 8P20 = 8.2pF 1K5 =1.5kV F: 1% Values are E24 series 2220 F = Silver Palladium. 2K0 = 2kV G: 2% RoHS compliant 2K5 =2.5kV 10pF 2225 J: 5% 3K0 =3kV J = Silver base with First digit is 0. K: 10% 4K0 =4kV 3640 nickel barrier (100% Second and third digits are 5K0 =5kV M: 20% matte tin plating). significant figures of 6K0 =6kV 5550 RoHS compliant capacitance code. 8K0 =8kV 10K =10kV 8060 The fourth digit is the A = Silver base with 12K =12kV number of zeros following. nickel barrier (tin/lead plating with min. 10% e.g., 0101 = 100 pF lead). Values are E12 series Not RoHS compliant Knowles 2014 StandardMLCCDatasheet Issue 4 (P109801) Release Date 04/11/14 Page 1 of 6 Tel: +44 1603 723300 Email SyferSales knowles.com www.knowlescapacitors.com/syfer Soldering Information Rework of Chip Capacitors Syfer MLCCs are compatible with all recognised Syfer recommend hot air/gas as the preferred method of soldering/mounting methods for chip capacitors. A detailed applying heat for rework. Apply even heat surrounding the application note is available at syfer.com component to minimise internal thermal gradients. Soldering irons or other techniques that apply direct heat to the chip or Reflow Soldering surrounding area should not be used as these can result in micro cracks being generated. Syfer recommend reflow soldering as the preferred method for mounting MLCCs. Syfer MLCCs can be reflow soldered using a Minimise the rework heat duration and allow components to reflow profile generally defined in IPC/FEDEC J-STD-020. Sn cool naturally after soldering. plated termination chip capacitors are compatible with both conventional and lead free soldering with peak temperatures of Use of Silver Loaded Epoxy Adhesives 260 to 270C acceptable. Chip capacitors can be mounted to circuit boards using silver The heating ramp rate should be such that components see a loaded adhesive provided the termination material of the temperature rise of 1.5 to 4C per second to maintain capacitor is selected to be compatible with the adhesive. This temperature uniformity through the MLCC. is normally PdAg. Standard tin finishes are often not recommended for use with silver loaded epoxies as there can The time for which the solder is molten should be maintained be electrical and mechanical issues with the joint integrity due at a minimum, so as to prevent solder leaching. Extended to material mismatch. times above 230C can cause problems with oxidation of Sn plating. Use of an inert atmosphere can help if this problem is encountered. Palladium/Silver (Pd/Ag) terminations can be Handling & Storage particularly susceptible to leaching with free lead, tin rich solders and trials are recommended for this combination. Components should never be handled with fingers perspiration and skin oils can inhibit solderability and will Cooling to ambient temperature should be allowed to occur aggravate cleaning. naturally, particularly if larger chip sizes are being soldered. Natural cooling allows a gradual relaxation of thermal Chip capacitors should never be handled with metallic mismatch stresses in the solder joints. Forced cooling should instruments. Metal tweezers should never be used as these be avoided as this can induce thermal breakage. can chip the product and leave abraded metal tracks on the product surface. Plastic or plastic coated metal types are Wave Soldering readily available and recommended these should be used Wave soldering is generally acceptable, but the thermal with an absolute minimum of applied pressure. stresses caused by the wave have been shown to lead to potential problems with larger or thicker chips. Particular care Incorrect storage can lead to problems for the user. Rapid should be taken when soldering SM chips larger than size 1210 tarnishing of the terminations, with an associated degradation and with a thickness greater than 1.0mm for this reason. of solderability, will occur if the product comes into contact with industrial gases such as sulphur dioxide and chlorine. Maximum permissible wave temperature is 270C for SM Storage in free air, particularly moist or polluted air, can result chips. in termination oxidation. The total immersion time in solder should be kept to a Packaging should not be opened until the MLCs are required minimum. It is strongly recommended that Sn/Ni plated for use. If opened, the pack should be re-sealed as soon as terminations are specified for wave soldering applications. practicable. Alternatively, the contents could be kept in a sealed container with an environmental control agent. Solder Leaching Long term storage conditions, ideally, should be temperature Leaching is the term for the dissolution of silver into the solder controlled between -5 and +40C and humidity controlled causing a failure of the termination system which causes between 40% and 60% R.H. increased ESR, tan and open circuit faults, including ultimately the possibility of the chip becoming detached. Taped product should be stored out of direct sunlight, which might promote deterioration in tape or adhesive performance. Leaching occurs more readily with higher temperature solders and solders with a high tin content. Pb free solders can be very Product, stored under the conditions recommended above, in prone to leaching certain termination systems. To prevent its as received packaging, has a minimum shelf life of 2 leaching, exercise care when choosing solder allows and years. minimize both maximum temperature and dwell time with the molten solder. SM Pad Design Plated terminations with nickel or copper anti-leaching barrier layers are available in a range of top coat finishes to prevent Syfer conventional 2-terminal chip capacitors can generally be TM leaching occurring. These finishes also include Syfer FlexiCap mounted using pad designs in accordance with IPC-7351, for improved stress resistance post soldering. Generic Requirements for Surface Mount Design and Land Pattern Standards, but there are some other factors that have Multilayer ceramic chip with nickel or copper barrier been shown to reduce mechanical stress, such as reducing the termination pad width to less than the chip width. In addition, the position of the chip on the board should also be considered. 3-terminal components are not specifically covered by IPC- 7351, but recommended pad dimensions are included in the Syfer catalogue/website for these components. Knowles 2014 StandardMLCCDatasheet Issue 4 (P109801) Release Date 04/11/14 Page 2 of 6 Tel: +44 1603 723300 Email SyferSales knowles.com www.knowlescapacitors.com/syfer