High Temperature Capacitors X8R Electrical Details Capacitance Range 270pF to 1.8F Temperature Coefficient of Capacitance (TCC) 15% from -55C to +150C Dissipation Factor 0.025 Insulation Resistance (IR) 100G or 1000secs (whichever is the less) Voltage applied for 5 1 seconds, 50mA charging Dielectric Withstand Voltage (DWV) current maximum Ageing Rate 1% per decade (typical) Max Length Width Band Size Thickness The X8R dielectric will operate from -55 to +150C, with a maximum capacitance change 15% (L1) (W) (L2) (T) (without applied voltage). 0603 1.6 0.2 0.8 0.2 0.8 0.10 - 0.04 The devices are available in sizes 0805 to 2225, with voltage ranges from 25V to 3kV and 0805 2.0 0.3 1.25 0.2 1.3 0.13 0.75 capacitance values from 270pf to 1.8F. 1206 3.2 0.3 1.6 0.2 1.6 0.25 0.75 The capacitors have been developed by Syfer to meet demand from various applications in the automotive and industrial markets and in other electronic equipment exposed to high temperatures. 1210 3.2 0.3 2.5 0.3 2.0 0.25 0.75 The increased use of electronics in automotive under the hood applications has created demand for 1808 4.5 0.35 2.0 0.3 2.0 0.25 1.0 this product range. 1812 4.5 0.35 3.2 0.3 2.5 0.25 1.0 The X8R range incorporates a specially formulated termination with a nickel barrier finish that has 2220 5.7 0.4 5.0 0.4 4.2 0.25 1.0 been designed to enhance the mechanical performance of these SMD chip capacitors in harsh environments typically present in automotive applications. 2225 5.7 0.4 6.3 0.4 4.2 0.25 1.0 Note: All dimensions in mm For information, X8R dielectric contains lead within the ceramic and parts rated less than 250Vdc are not compliant with the EU 2011/65/EU RoHS directive. X8R High Temperature capacitors minimum/maximum capacitance values according to the rated d.c. voltage 0805 1206 1210 1808 1812 2220 2225 Minimum Capacitance Value 680pF 270pF 680pF 390pF 1.0nF 2.7nF 3.9nF 25V 56nF 180nF 330nF 470nF 680nF 1.5F 1.8F 50V 33nF 120nF 220nF 270nF 470nF 680nF 1.0F 100V 15nF 56nF 120nF 150nF 220nF 470nF 560nF 200/250V 10nF 33nF 68nF 82nF 120nF 220nF 330nF 500V 3.9nF 18nF 39nF 47nF 100nF 180nF 270nF Maximum capacitance value 630V 1.8nF 3.9nF 10nF 12nF 33nF 150nF 180nF according to the 1kV 1.0nF 2.2nF 4.7nF 5.6nF 18nF 39nF 56nF rated voltage 1.2kV - 1.8nF 3.9nF 4.7nF 12nF 33nF 39nF 1.5kV - 1.2nF 2.2nF 2.7nF 8.2nF 22nF 27nF 2kV - 470pF 1.2nF 1.8nF 4.7nF 12nF 18nF 2.5kV - - - 1.0nF 2.7nF 6.8nF 10nF 3kV - - - 680pF 2.2nF 4.7nF 5.6nF Ordering Information X8R High Temperature Range 1206 Y 100 0473 K N T Capacitance Chip Size Termination Voltage d.c. Capacitance in picofarads (pF) Dielectric Codes Packaging Tolerance TM 0805 Y = FlexiCap 025 = 25V First digit is 0. J = 5% N = X8R T = 178mm (7) reel termination base 1206 050 = 50V Second and third digits are significant K = 10% R = 330mm (13) reel with nickel figures of capacitance code. 1210 100 = 100V M = 20% B = Bulk pack tubs or trays barrier (100% The fourth digit is the number of zeros matte tin 1808 200 = 200V following. plating). 1812 250 = 250V Examples: RoHS Compliant 2220 500 = 500V 0473 = 47000 pF = 47nF 2225 630 = 630V 1K0 = 1kV 1K2 =1.2kV 1K5 =1.5kV 2K5 =2.5kV 3K0 =3kV X8RDatasheet Issue 1 (P107372) Release Date 05/03/13 Page 1 of 6 Soldering Information Rework of Chip Capacitors Syfer MLCCs are compatible with all recognised Syfer recommend hot air/gas as the preferred method of soldering/mounting methods for chip capacitors. A detailed applying heat for rework. Apply even heat surrounding the application note is available at syfer.com component to minimise internal thermal gradients. Soldering irons or other techniques that apply direct heat to the chip or Reflow Soldering surrounding area should not be used as these can result in micro cracks being generated. Syfer recommend reflow soldering as the preferred method for mounting MLCCs. Syfer MLCCs can be reflow soldered using a Minimise the rework heat duration and allow components to reflow profile generally defined in IPC/FEDEC J-STD-020. Sn cool naturally after soldering. plated termination chip capacitors are compatible with both conventional and lead free soldering with peak temperatures of Use of Silver Loaded Epoxy Adhesives 260 to 270C acceptable. Chip capacitors can be mounted to circuit boards using silver The heating ramp rate should be such that components see a loaded adhesive provided the termination material of the temperature rise of 1.5 to 4C per second to maintain capacitor is selected to be compatible with the adhesive. This temperature uniformity through the MLCC. is normally PdAg. Standard tin finishes are often not recommended for use with silver loaded epoxies as there can The time for which the solder is molten should be maintained be electrical and mechanical issues with the joint integrity due at a minimum, so as to prevent solder leaching. Extended to material mismatch. times above 230C can cause problems with oxidation of Sn plating. Use of an inert atmosphere can help if this problem is encountered. Palladium/Silver (Pd/Ag) terminations can be Handling & Storage particularly susceptible to leaching with free lead, tin rich solders and trials are recommended for this combination. Components should never be handled with fingers perspiration and skin oils can inhibit solderability and will Cooling to ambient temperature should be allowed to occur aggravate cleaning. naturally, particularly if larger chip sizes are being soldered. Natural cooling allows a gradual relaxation of thermal Chip capacitors should never be handled with metallic mismatch stresses in the solder joints. Forced cooling should instruments. Metal tweezers should never be used as theses be avoided as this can induce thermal breakage. can chip the product and leave abraded metal tracks on the product surface. Plastic or plastic coated metal types are Wave Soldering readily available and recommended these should be used Wave soldering is generally acceptable, but the thermal with an absolute minimum of applied pressure. stresses caused by the wave have been shown to lead to potential problems with larger or thicker chips. Particular care Incorrect storage can lead to problems for the user. Rapid should be taken when soldering SM chips larger than size 1210 tarnishing of the terminations, with an associated degradation and with a thickness greater than 1.0mm for this reason. of solderability, will occur if the product comes into contact with industrial gases such as sulphur dioxide and chlorine. Maximum permissible wave temperature is 270C for SM Storage in free air, particularly moist or polluted air, can result chips. in termination oxidation. The total immersion time in solder should be kept to a Packaging should not be opened until the MLCs are required minimum. It is strongly recommended that Sn/Ni plated for use. If opened, the pack should be re-sealed as soon as terminations are specified for wave soldering applications. practicable. Alternatively, the contents could be kept in a sealed container with an environmental control agent. Solder Leaching Long term storage conditions, ideally, should be temperature Leaching is the term for the dissolution of silver into the solder controlled between -5 and +40C and humidity controlled causing a failure of the termination system which causes between 40% and 60% R.H. increased ESR, tan and open circuit faults, including ultimately the possibility of the chip becoming detached. Taped product should be stored out of direct sunlight, which might promote deterioration in tape or adhesive performance. Leaching occurs more readily with higher temperature solders and solders with a high tin content. Pb free solders can be very Product, stored under the conditions recommended above, in prone to leaching certain termination systems. Ro prevent its as received packaging, has a minimum shelf life of 2 leaching, exercise care when choosing solder allows and years. minimize both maximum temperature and dwell time with the molten solder. SM Pad Design Plated terminations with nickel or copper anti-leaching barrier layers are available in a range of top coat finishes to prevent Syfer conventional 2-terminal chip capacitors can generally be TM leaching occurring. These finishes also include Syfer FlexiCap mounted using pad designs in accordance with IPC-7351, for improved stress resistance post soldering. Generic Requirements for Surface Mount Design and Land Pattern Standards, but there are some other factors that have Multilayer ceramic chip with nickel or copper barrier been shown to reduce mechanical stress, such as reducing the termination pad width to less than the chip width. In addition, the position of the chip on the board should also be considered. 3-terminal components are not specifically covered by IPC- 7351, but recommended pad dimensions are included in the Syfer catalogue/website for these components. X8RDatasheet Issue 1 (P107372) Release Date 05/03/13 Page 2 of 6