EFR32FG14 Flex Gecko Proprietary
Protocol SoC Family Data Sheet
The Flex Gecko proprietary protocol family of SoCs is part of the
KEY FEATURES
Wireless Gecko portfolio. Flex Gecko SoCs are ideal for enabling
energy-friendly proprietary protocol networking for IoT devices.
32-bit ARM Cortex-M4 core with 40
MHz maximum operating frequency
The single-die solution provides industry-leading energy efficiency, ultra-fast wakeup
Up to 256 kB of flash and 32 kB of RAM
times, a scalable power amplifier, an integrated balun and no-compromise MCU fea-
Pin-compatible across EFR32FG families
tures.
(exceptions apply for 5V-tolerant pins)
12-channel Peripheral Reflex System
Flex Gecko applications include:
enabling autonomous interaction of MCU
peripherals
Home and Building Automation and Security
Autonomous Hardware Crypto Accelerator
Metering
Integrated PA with up to 19 dBm (2.4
Electronic Shelf Labels
GHz) or 20 dBm (Sub-GHz) tx power
Industrial Automation
Integrated balun for 2.4 GHz
Commercial and Retail Lighting and Sensing
Robust peripheral set and up to 32 GPIO
Core / Memory Clock Management Energy Management Other
H-F Crystal H-F Voltage
Voltage Monitor
CRYPTO
Oscillator RC Oscillator Regulator
TM
ARM Cortex M4 processor Flash Program
with DSP extensions, FPU and MPU Memory
Auxiliary H-F RC L-F DC-DC
Power-On Reset CRC
Oscillator RC Oscillator
Converter
L-F Crystal
Ultra L-F RC Brown-Out
SMU
Debug Interface RAM Memory LDMA Controller
Oscillator Oscillator Detector
32-bit bus
Peripheral Reflex System
Radio Transceiver Serial I/O Ports Timers and Triggers Analog I/F
Interfaces
RFSENSE
Sub GHz
DEMOD
I
External ADC
USART Timer/Counter Protocol Timer
LNA
Interrupts
RF Frontend
IFADC
PGA
Analog
PA
Low Energy General Low Energy Low Energy
Comparator
Q
TM
UART Purpose I/O Timer Sensor Interface
To Sub GHz
receive I/Q
AGC
IDAC
RFSENSE mixers and PA
2
2.4 GHz I C Pin Reset Pulse Counter Watchdog Timer
I
VDAC
Frequency
LNA
MOD
Real Time
Synthesizer
RF Frontend
BALUN
Pin Wakeup Counter and Cryotimer
Op-Amp
PA Calendar
To 2.4 GHz receive To Sub GHz
Q
I/Q mixers and PA and 2.4 GHz PA
Lowest power mode with peripheral operational:
EM0Active EM1Sleep EM2Deep Sleep EM3Stop EM4Hibernate EM4Shutoff
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RAC BUFCEFR32FG14 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Feature List
1. Feature List
The EFR32FG14 highlighted features are listed below.
Low Power Wireless System-on-Chip Wide selection of MCU peripherals
12-bit 1 Msps SAR Analog to Digital Converter (ADC)
High Performance 32-bit 40 MHz ARM Cortex -M4 with
DSP instruction and floating-point unit for efficient signal
2 Analog Comparator (ACMP)
processing
2 Digital to Analog Converter (VDAC)
Up to 256 kB flash program memory
2 Operational Amplifier (Opamp)
Up to 32 kB RAM data memory
Digital to Analog Current Converter (IDAC)
2.4 GHz and Sub-GHz radio operation
Low-Energy Sensor Interface (LESENSE)
Transmit power:
Up to 32 pins connected to analog channels (APORT)
2.4 GHz radio: Up to 19 dBm
shared between analog peripherals
Sub-GHz radio: Up to 20 dBm
Up to 32 General Purpose I/O pins with output state reten-
tion and asynchronous interrupts
Low Energy Consumption
8 Channel DMA Controller
8.4 mA RX current at 38.4 kbps, GFSK, 169 MHz
12 Channel Peripheral Reflex System (PRS)
8.8 mA RX current at 1 Mbps, GFSK, 2.4 GHz
2 16-bit Timer/Counter
10.2 mA RX current at 250 kbps, DSSS-OQPSK, 2.4 GHz
3 or 4 Compare/Capture/PWM channels
8.5 mA TX current at 0 dBm output power at 2.4 GHz
1 32-bit Timer/Counter
35.3 mA TX current at 14 dBm output power at 868 MHz
3 Compare/Capture/PWM channels
67 A/MHz in Active Mode (EM0)
32-bit Real Time Counter and Calendar
1.3 A EM2 DeepSleep current (16 kB RAM retention and
RTCC running from LFRCO)
16-bit Low Energy Timer for waveform generation
Wake on Radio with signal strength detection, preamble
32-bit Ultra Low Energy Timer/Counter for periodic wake-up
pattern detection, frame detection and timeout
from any Energy Mode
High Receiver Performance
16-bit Pulse Counter with asynchronous operation
-93.8 dBm sensitivity at 1 Mbit/s GFSK, 2.4 GHz
2 Watchdog Timer with dedicated RC oscillator
-103.3 dBm sensitivity at 250 kbps DSSS-OQPSK, 2.4 GHz
2 Universal Synchronous/Asynchronous Receiver/Trans-
2
-126.2 dBm sensitivity at 600 bps, GFSK, 915 MHz mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I S)
-120.6 dBm sensitivity at 2.4 kbps, GFSK, 868 MHz
Low Energy UART (LEUART )
-109.9 dBm sensitivity at 4.8 kbps, OOK, 433 MHz 2
I C interface with SMBus support and address recognition
-112.2 dBm sensitivity at 38.4 kbps, GFSK, 169 MHz
in EM3 Stop
Supported Modulation Formats Wide Operating Range
2/4 (G)FSK with fully configurable shaping
1.8 V to 3.8 V single power supply
BPSK / DBPSK TX Integrated DC-DC, down to 1.8 V output with up to 200 mA
load current for system
OOK / ASK
Standard (-40 C to 85 C) and Extended (-40 C to 125 C)
Shaped OQPSK / (G)MSK
temperature grades available
Configurable DSSS and FEC
Support for Internet Security
Supported Protocols
General Purpose CRC
Proprietary Protocols
Random Number Generator
Wireless M-Bus
Hardware Cryptographic Acceleration for AES 128/256,
Selected IEEE 802.15.4g SUN-FSK PHYs
SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC
Low Power Wide Area Networks
QFN32 5x5 mm Package
Suitable for Systems Targeting Compliance With:
QFN48 7x7 mm Package
FCC Part 90.210 Mask D, FCC part 15.247, 15.231, 15.249
ETSI Category I Operation, EN 300 220, EN 300 328
ARIB T-108, T-96
China regulatory
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