MX25L25673GZ4I-08G

MX25L25673G MX25L25673G 3V, 256M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY Key Features Protocol Support - Single I/O, Dual I/O and Quad I/O Support DTR (Double Transfer Rate) Mode Support clock frequency up to 133MHz Quad I/O mode is permanently enabledMX25L25673G Contents 1. FEATURES ..............................................................................................................................................................4 2. GENERAL DESCRIPTION .....................................................................................................................................5 Table 1. Read performance Comparison ....................................................................................................5 3. PIN CONFIGURATIONS .........................................................................................................................................6 4. PIN DESCRIPTION ..................................................................................................................................................6 5. BLOCK DIAGRAM ...................................................................................................................................................7 6. DATA PROTECTION ................................................................................................................................................8 Table 2. Protected Area Sizes .....................................................................................................................9 Table 3. 4K-bit Secured OTP Definition ....................................................................................................10 7. Memory Organization ........................................................................................................................................... 11 Table 4. Memory Organization .................................................................................................................. 11 8. DEVICE OPERATION ............................................................................................................................................12 8-1. 256Mb Address Protocol .......................................................................................................................... 14 8-2. Quad Peripheral Interface (QPI) Read Mode .......................................................................................... 15 9. COMMAND DESCRIPTION ...................................................................................................................................16 Table 5. Command Set ..............................................................................................................................16 9-1. Write Enable (WREN) .............................................................................................................................. 21 9-2. Write Disable (WRDI) ............................................................................................................................... 22 9-3. Factory Mode Enable (FMEN) ................................................................................................................. 23 9-4. Read Identification (RDID) ....................................................................................................................... 24 9-5. Release from Deep Power-down (RDP), Read Electronic Signature (RES) ........................................... 25 9-6. Read Electronic Manufacturer ID & Device ID (REMS) ........................................................................... 27 9-7. QPI ID Read (QPIID) ............................................................................................................................... 28 Table 6. ID Definitions ..............................................................................................................................28 9-8. Read Status Register (RDSR) ................................................................................................................. 29 9-9. Read Configuration Register (RDCR) ...................................................................................................... 30 Table 7. Status Register ............................................................................................................................33 Table 8. Configuration Register .................................................................................................................34 Table 9. Output Driver Strength Table .......................................................................................................35 Table 10. Dummy Cycle and Frequency Table (MHz) ...............................................................................35 9-10. Write Status Register (WRSR) ................................................................................................................. 36 Table 11. Protection Modes .......................................................................................................................37 9-11. Enter 4-byte mode (EN4B) ...................................................................................................................... 39 9-12. Exit 4-byte mode (EX4B) ......................................................................................................................... 39 9-13. Read Data Bytes (READ) ........................................................................................................................ 40 9-14. Read Data Bytes at Higher Speed (FAST_READ) .................................................................................. 41 9-15. Dual Output Read Mode (DREAD) .......................................................................................................... 43 9-16. 2 x I/O Read Mode (2READ) ................................................................................................................... 44 9-17. Quad Read Mode (QREAD) .................................................................................................................... 45 9-18. 4 x I/O Read Mode (4READ) ................................................................................................................... 46 9-19. 4 x I/O Double Transfer Rate Read Mode (4DTRD) ................................................................................ 48 9-20. Preamble Bit ........................................................................................................................................... 50 9-21. 4 Byte Address Command Set ................................................................................................................. 54 9-22. Burst Read ............................................................................................................................................... 57 9-23. Performance Enhance Mode ................................................................................................................... 58 9-24. Sector Erase (SE) .................................................................................................................................... 61 9-25. Block Erase (BE32K) ............................................................................................................................... 62 P/N: PM2323 Rev. 1.4, August 24, 2017 2