KH231 Fast Settling, Wideband Buffer/Amplifier (A = 1 to 5) v Features General Description The KH231 Buffer/Amplifier is a wideband operational n 165MHz closed-loop -3dB bandwidth amplifier designed specifically for high-speed, low- n 15ns settling to 0.05% gain applications. The KH231 is based on a current n 1mV input offset voltage, 10V/C drift feedback op amp topology-a unique design that both n 100mA output current eliminates the gain-bandwidth tradeoff and permits n Excellent AC and DC linearity unprecedented high-speed performance. (See table below.) n Direct replacement for CLC231 The KH231 Buffer/Amplifier is the ideal design alter- Applications native to low precision open-loop buffers and oscillation- prone conventional op amps. The KH231 offers precise n Driving flash A/D converters gains from 1.000 to -5.000 and linearity that is a n Precision line driving true 0.1%-even for demanding 50 loads. Open-loop (a gain of 2 cancels matched-line losses) buffers, on the other hand, offer a nominal gain of n DAC current-to-voltage conversion 0.95 0.03 and a linearity of only 3% for typical loads. n Low-power, high-speed applications (50mW 5V) A buffers settling time may look impressive but it is Small Signal Pulse Response usually specified at unrealistically large load resis- tances or when the effects of thermal tail are not included the KH231 Buffer/Amplifier settles to 0.05% A = 2 v in 15ns-while driving a 100 load. Offsets and drifts, usually a low priority in conven- tional high-speed op amp designs, were not ignored in the KH231 the input offset voltage is typically 1mV A = -2 v and input offset voltage drift is only 10V/C. The KH231 is stable and oscillation-free across the entire Time (5ns/div) gain range and since its internally compensated, the user is saved the trouble of designing external com- Bottom View K pensation networks and having to tweak them in I Adjust CC production. The absence of a gain-bandwidth trade- Case Supply ground Voltage Adjust -V off in the KH231 allows performance to be predicted GND CC 7 8 9 easily the table below shows how the bandwidth is -V CC Non-Inverting Collector V+ 6 10 Input Supply affected very little by changing the gain setting. + 4 Inverting Output V- 5 11 V o Input 4 - The KH231 is constructed using thin film resistor/bipolar Not NC 4 12 Collector transistor technology, and is available in the following Connected Supply +V CC 3 2 1 versions: Case GND Adjust +V CC ground Supply Voltage The KH231 is constructed using thin film resistor/bipolar I Adjust CC transistor technology, and available in these versions: Pins 2 and 8 are used to adjust the supply current or to adjust the off- KH231AI -25C to +85C 12-pin TO-8 can set voltage (see text). These pins are normally left unconnected. KH231AK -55C to +125C 12-pin TO-8 can, features burn-in & hermetic testing Typical Performance KH231AM -55C to +125C 12-pin TO-8 can, Gain Setting environmentally Parameter 1 2 5 -1 -2 -5 Units screened and electrically tested to MIL-STD-883 -3dB bandwidth 180 165 130 165 150 115 MHz KH231HXC -55C to +125C SMD : 5962-8959401HXC rise time (2V) 1.8 2.0 2.5 2.0 2.2 2.9 ns KH231HXA -55C to +125C SMD : 5962-8959401HXA slew rate 2.5 3.0 3.0 3.0 3.0 3.0 V/ns settling time (to 0.1%) 12 12 12 12 12 15 ns REV. 1A January 2004 Output Voltage (400mV/div) DATA SHEET KH231 (T = +25C, A = +2V, V = 15V, R = 100, R = 250 unless specified) KH231 Electrical Characteristics A v CC L f PARAMETERS CONDITIONS TYP MIN & MAX RATINGS UNITS SYM Ambient Temperature KH231AI +25C -25C +25C +85C Ambient Temperature KH231AK/AM/HXC/HXA +25C -55C +25C +125C FREQUENCY DOMAIN RESPONSE = -3dB bandwidth (note 2) V 2V 165 >145 >145 >120 MHz SSBW o pp large-signal bandwidth V 10V 95 >80 >80 >60 MHz FPBW o pp gain flatness (note 2) V 2V o pp = peaking 0.1 to 50MHz 0.1 <0.6 <0.3 <0.6 dB GFPL = peaking >50MHz 0.1 <1.5 <0.3 <0.8 dB GFPH = rolloff at 100MHz 0.4 <0.6 <0.6 <1.0 dB GFR group delay to 100MHz 3.5 0.5 ns GD linear phase deviation to 100MHz 0.5 <2.0 <2.0 <2.0 LPD reverse isolation non-inverting 53 >43 >43 >43 dB RINI inverting 36 >26 >26 >26 dB RIIN TIME DOMAIN RESPONSE rise and fall time 2V step 2.0 <2.4 <2.3 <2.7 ns TRS 10V step 5.0 <7.0 <6.5 <6.5 ns TRL settling time to 0.05% 5V step 15 ns TS to 0.1% 2.5V step 12 <22 <17 <22 ns TSP overshoot 5V step 5 <15 <10 <15 % OS slew rate (overdriven input) 3.0 >2.5 >2.5 >1.8 V/ns SR overload recovery <1% error <50ns pulse, 200% overdrive 120 ns OR NOISE AND DISTORTION RESPONSE = 2nd harmonic distortion 0dBm, 20MHz -55 <-47 <-47 <-47 dBc HD2 = 3rd harmonic distortion 0dBm, 20MHz -59 <-47 <-47 <-47 dBc HD3 equivalent input noise noise floor >5MHz -153 <-150 <-150 <-150 dBm(1Hz) SNF integrated noise 5MHz to 200MHz 70 <100 <100 <100 Vrms INV STATIC, DC PERFORMANCE * input offset voltage 1 <4.0 <2.0 <4.5 mV VIO average temperature coefficient 10 <25 <25 <25 V/C DVIO * input bias current non-inverting 5.0 <29 <21 <31 A IBN average temperature coefficient 50 <125 <125 <125 nA/C DIBN * input bias current inverting 10 <31 <15 < 35 A IBI average temperature coefficient 125 <200 <200 <200 nA/C DIBI * power supply rejection ratio 50 >45 >45 >45 dB PSRR common mode rejection ratio 46 >40 >40 >40 dB CMRR * supply current no load 18 <22 <22 <22 mA ICC MISCELLANEOUS PERFORMANCE non-inverting input resistance DC 400 >100 >200 >400 k RIN non-inverting input capacitance 1.3 <2.5 <2.5 <2.5 pF CIN output impedance 100MHz 5, 37 , nH RO output voltage range no load 12 >11 >11 >11 V VO Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Absolute Maximum Ratings Recommended Operating Conditions V 20V V 5V to 15V CC CC I 100mA I 75mA o o common mode input voltage, V (see V and V common mode input voltage ( V -5)V o cm o CC limits plot on page 3) gain range 1 to 5 differential input voltage 3V note 3: In the noninverting configuration, care should be taken when thermal resistance (see thermal model) choosing R , the input impedance setting resistor bias i junction temperature +175C currents of typically 5A but as high as 24Acan create an operating temperature AI: -25C to +85C input signal large enough to cause overload. It is therefore AK/AM: -55C to +125C recommended that R < (V /A )/24A. i CC v storage temperature -65C to +150C note 4: These ratings protect against damage to the input stage lead temperature (soldering 10s) +300C caused by saturation of either the input or output stages at note 1: * AI/AK/AM/HXC/HXA 100% tested at +25C lower supply voltages, and against exceeding transistor = AK/AM/HXC/HXA 100% tested at +25C and sample collector-emitter breakdown ratings at high supply voltages. tested at -55C and +125C V is calculated by assuming no output saturation. out(max) = AI sample tested at +25C Saturation is allowed to occur up to this calculated level of note 2: The output amplitude used in testing is 0.63V . Performance V . V is defined as the voltage at the non-inverting pp out cm is guaranteed for conditions listed. input, pin 6. 2 REV. 1A January 2004