SP4082E 5V RS-485/RS-422 Transceivers 1/8th Unit Load, Slew-Rate Limited, 15kV ESD-Protected FEATURES 5.0V single supply operation Receiver failsafe on open or shorted lines 1/8th Unit Load, 256 transceivers on bus Robust ESD protection for RS-485 pins Vcc RO 1 8 15kV Human Body Model 8 PIN NSOIC RE B Controlled driver slew rates 2 7 SP4082E 115kbps, Low EMI DE 6 A 3 Driver short circuit current limit and Half Duplex thermal shutdown for overload protection GND DI 4 5 Industry standard package footprints APPLICATIONS Motor Control Building Automation Security Systems Remote Meter Reading Long or un-terminated transmission lines DESCRIPTION The SP4082E is designed for reliable, bidirectional communication on multipoint bus transmission lines. The device contains one differential driver and one differential receiver. It is a half-duplex - de vice. The device complys with TIA/EIA-485 and TIA/EIA-422 standards. Lead-free and RoHS compli- ant packages are available. This device is ruggedized for use in harsh operating conditions over the entire common-mode volt- age range from -7V to +12V. Receivers are specially designed to fail-safe to a logic high output state if the inputs are un-driven or shorted. All RS-485 bus-pins are protected against severe ESD events up to 15kV (Human Body Model). Drivers are protected from excess current flow caused by bus contention or output short-circuits by both an internal current limit and a thermal-overload shutdown. Devices are rated for industrial (-40 to +85C) operating temperatures. Receivers have exceptionally high input impedance, which places only 1/8th the standard load on a shared bus. Up to 256 trans- ceivers may coexist while preserving full signal margin. The device operates from a single 5.0V power supply and draws negligible quiescent power. The device has an independent enable and disable for the driver and receiver and will enter a low power shutdown mode if both driver and receiver are disabled. All outputs maintain high impedance during shutdown or when powered-off. SP4082E 101 012920 1PIN ASSIGNMENTS Pin Number Pin Name Pin Function Receiver Output. When RE is low and if (A B) -40mV, RO 1 RO is high. If (A B) - 200mV, RO is low. Receiver Output Enable. When RE is low, RO is enabled. 2 REREREE When RE is high, RO is high impedance. Drive RE high and DE low to enter shutdown mode. Driver Output Enable. When DE is high, outputs are enabled. When DE is low, outputs are high impedance. Drive DE low 3 DE and RE high to enter shutdown mode. Driver Input. With DE high, a low level on DI forces non- inverting output low and inverting output high. A high level on 4 DI DI forces non-inverting output high and inverting output low. 5 GND Ground 6 A Non-inverting Receiver Input and Non-inverting Driver Output 7 B Inverting Receiver Input and Inverting Driver Output Positive Supply VCC. Bypass to GND with a 0.1uF capacitor. 8 Vcc DEVICE ARCHITECTURE AND BLOCK DIAGRAM 8 1 VCC R RO 2 7 RE B 8-Pin Half Duplex 3 6 DE A 4 DI D 5 GND SP4082E 101 012920 2