ST16C2550 2.97V TO 5.5V DUART WITH 16-BYTE FIFO JANUARY 2011 REV. 4.4.1 FEATURES GENERAL DESCRIPTION Added feature in devices with top mark date code The ST16C2550 (C2550) is a dual universal of A2 YYW and newer: asynchronous receiver and transmitter (UART). The ST16C2550 is an improved version of the PC16550 5 Volt Tolerant Inputs UART with higher operating speed and faster access Pin-to-pin compatible to Exars ST16C2450, times. The C2550 provides enhanced UART XR16L2550 and XR16L2750 functions with 16 byte FIFOs, a modem control Pin-to-pin compatible to TIs TL16C752B on the 48- interface, and data rates up to 4 Mbps. Onboard TQFP package status registers provide the user with error indications and operational status. System interrupts and modem Pin alike XR16C2850 48-TQFP package but control features may be tailored by external software without CLK8/16, CLKSEL and HDCNTL inputs to meet specific user requirements. Independent 2 independent UART channels programmable baud rate generators are provided to Up to 4 Mbps with external clock of 64 MHz select transmit and receive clock rates from 50 bps to Up to 1.5 Mbps data rate with a 24 MHz crystal 4 Mbps. The Baud Rate Generator can be configured frequency for either crystal or external clock input. An internal 16 byte Transmit FIFO to reduce the bandwidth loopback capability allows onboard diagnostics. The requirement of the external CPU C2550 is available in a 44-pin PLCC and 48-pin TQFP packages. The C2550 is fabricated in an 16 byte Receive FIFO with error tags to reduce advanced CMOS process capable of operating from the bandwidth requirement of the external CPU 2.97 volt to 5.5 volt power supply. 4 selectable Receive FIFO interrupt trigger levels APPLICATIONS Modem control signals (CTS , RTS , DSR , Portable Appliances DTR , RI , CD ) Telecommunication Network Routers Programmable character lengths (5, 6, 7, 8) with even, odd, or no parity Ethernet Network Routers Crystal oscillator or external clock input Cellular Data Devices 48-TQFP and 44-PLCC packages Factory Automation and Process Controls FIGURE 1. ST16C2550 BLOCK DIAGRAM 2.97V to 5.5V A2:A0 GND D7:D0 IOR UART Channel A IOW TXA, RXA, DTRA , 16 Byte TX FIFO CSA UART DSRA , RTSA , Regs DTSA , CDA , RIA , CSB TX & RX OP2A 8-bit Data INTA BRG Bus 16 Byte RX FIFO INTB Interface TXRDYA TXB, RXB, DTRB , TXRDYB UART Channel B DSRB , RTSB , RXRDYA (same as Channel A) CTSB , CDB , RIB , RDRXYB OP2B Reset XTAL1 Crystal Osc/Buffer XTAL2 Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com ST16C2550 2.97V TO 5.5V DUART WITH 16-BYTE FIFO REV. 4.4.1 FIGURE 2. PIN OUT ASSIGNMENT 1 36 RESET D5 D6 2 35 DTRB D7 3 34 DTRA RTSA RXB 4 33 RXA 5 32 OP2A ST16C2550 TXRDYB 6 31 RXRDYA 48-pin TQFP TXA 7 30 INTA D0 1 40 VCC TXB 8 29 INTB D1 2 39 RIA A0 OP2B 9 28 CSA 10 27 A1 D2 3 38 CDA 11 26 A2 CSB D3 4 37 DSRA NC 12 25 NC D4 5 36 CTSA D5 6 35 RESET D6 7 34 DTRB D7 8 33 DTRA RXB 9 32 RTSA RXA 10 31 OP2A TXA 11 30 INTA TXB 12 29 INTB OP2B 13 28 A0 CSA 14 27 A1 D5 7 39 RESET 15 26 A2 CSB D6 8 38 DTRB XTAL1 16 25 CTSB D7 9 37 DTRA 17 RTSB RXB 10 36 RTSA XTAL2 24 11 35 OP2A RXA 18 RIB IOW 23 ST16C2550 TXRDYB 12 34 RXRDYA DSRB CDB 19 22 44-pin PLCC TXA 13 33 INTA IOR GND 20 21 TXB 14 32 INTB OP2B 15 31 A0 CSA 16 30 A1 17 29 A2 CSB 2 ST16C2550CP40 XTAL1 48 13 D4 18 XTAL1 6 D4 XTAL2 14 47 D3 XTAL2 19 5 D3 IOW 15 46 D2 20 IOW 4 D2 CDB 16 45 D1 CDB 21 3 D1 GND 17 44 D0 22 RXRDYB 43 TXRDYA GND 2 D0 18 IOR 19 42 VCC RXRDYB 23 1 TXRDYA DSRB 20 41 RIA IOR 24 44 VCC RIB 21 40 CDA DSRB 25 43 RIA RTSB 39 22 DSRA RIB 26 42 CDA CTSB 38 CTSA 23 RTSB 27 41 DSRA NC 24 37 NC CTSB 28 40 CTSA