XR16L2751 2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE APRIL 2010 REV. 1.2.3 FEATURES GENERAL DESCRIPTION 2.25 to 5.5 Volt Operation 1 The XR16L2751 (2751) is a low voltage dual 5 Volt Tolerant Inputs universal asynchronous receiver and transmitter (UART) with 5 Volt tolerant inputs. The device Functionally Compatible to ST16C2550 and includes 2 additional capabilities over the XR16C2850 with 4 additional inputs XR16L2750: Intel and Motorola data bus selection Intel or Motorola Data Bus Interface Select and a PowerSave mode to further reduce sleep Two Independent UARTs current to a minimum during sleep mode. The 2751s register set is compatible to the ST16C2550 and Up to 6.25 Mbps at 5 Volt, 4 Mbps at 3.3 Volt, XR16C2850 but with added functions. It supports the and 3 Mbps at 2.5 Volt with 8X sampling rate Exars enhanced features of 64 bytes of TX and RX 64 bytes of Transmit and Receive FIFOs FIFOs, programmable FIFO trigger level, FIFO level Transmit and Receive FIFO Level Counters counters, automatic hardware and software flow Programmable TX and RX FIFO Trigger Levels control, automatic RS-485 half duplex direction Automatic Hardware (RTS/CTS) Flow Control control, and a complete modem interface. Onboard Selectable RTS Flow Control Hysteresis. registers provide the user with operational status and data error tags. An internal loopback capability allows Automatic Software (Xoff/Xon) Flow Control onboard diagnostics. Independent programmable Automatic RS-485 2-wire Half-duplex Direction baud rate generator is provided in each UART Control to the Transceiver via RTS channel to support data rates up to 6.25 Mbps. Full Modem Interface NOTE: 1 Covered by U.S. Patent 5,649,122 and 5,949,787 Infrared Receive and Transmit Encoder/ decoder APPLICATIONS PowerSave Feature reduces sleep current to 15 Portable and Battery Operated Appliances A at 3.3 Volt Wireless Access Servers Device Identification Ethernet Network Routers Crystal or external clock input Cellular Data Devices Industrial and Commercial Temperature ranges Telecommunication Network Routers 48 TQFP Package (7 x 7 x 1.0 mm) Factory Automation and Process Controls FIGURE 1. XR16L2751 BLOCK DIAGRAM *5 Volt Tolerant Inputs 2.25 to 5.5 Volt VCC PwrSave (Except XTAL1) GND A2:A0 D7:D0 UART Channel A IOR (VCC) TXA, RXA, DTRA , IOW (R/W ) 64 Byte TX FIFO UART DSRA , RTSA , CSA (CS ) Regs IR DTSA , CDA , RIA , TX & RX CSB (A3) ENDEC OP2A BRG INTA (IRQ ) 64 Byte RX FIFO INTB (logic 0) TXB, RXB, DTRB , TXRDYA Intel or UART Channel B DSRB , RTSB , TXRDYB Motorola (same as Channel A) CTSB , CDB , RIB , RXRDYA Data Bus OP2B RXRDYB Interface XTAL1 Reset (Reset ) Crystal Osc/Buffer XTAL2 16/68 CLKSEL HDCNTL 2751BLK Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16L2751 2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE REV. 1.2.3 FIGURE 2. PIN OUT ASSIGNMENT RESET D5 1 36 D6 2 35 DTRB D7 3 34 DTRA RXB 4 33 RTSA RXA 5 32 OP2A XR16L2751 TXRDYB 6 31 RXRDYA 48-pin TQFP INTA TXA 7 30 (16 Mode ) INTB TXB 8 29 OP2B 9 28 A0 CSA 10 27 A1 CSB 11 26 A2 PWRSAVE 12 25 CLKSEL VCC D5 1 36 RESET D6 2 35 DTRB D7 3 34 DTRA RTSA RXB 4 33 RXA 5 32 OP2A XR16L2751 TXRDYB 6 31 RXRDYA 48-pin TQFP 7 30 IRQ TXA (68 Mode ) TXB 8 29 INTB OP2B 9 28 A0 CS 10 27 A1 A2 A3 11 26 PWRSAVE 12 25 CLKSEL GND ORDERING INFORMATION PART NUMBER PACKAGE OPERATING TEMPERATURE RANGE DEVICE STATUS XR16L2751CM 48-Lead TQFP 0C to +70C Active XR16L2751IM 48-Lead TQFP -40C to +85C Active 2 XTAL1 13 48 D4 XTAL1 13 48 D4 XTAL2 14 47 D3 XTAL2 14 47 D3 R/W 15 46 D2 IOW 15 46 D2 CDB 16 45 D1 CDB 16 45 D1 GND 44 D0 GND 44 D0 17 17 RXRDYB 18 43 TXRDYA RXRDYB 18 43 TXRDYA VCC 19 42 VCC IOR 19 42 VCC DSRB 20 41 RIA DSRB 20 41 RIA RIB 40 CDA RIB 21 40 CDA 21 39 39 RTSB 22 DSRA RTSB 22 DSRA CTSB 23 38 CTSA CTSB 23 38 CTSA 16/68 24 37 HDCNTL 16/68 24 37 HDCNTL