XR28V384 3.3V QUAD LPC UART WITH 128-BYTE FIFO MARCH 2018 REV. 1.0.2 FEATURES GENERAL DESCRIPTION 128 Byte Transmit and Receive FIFO The XR28V384 (V384) is a quad Universal Asynchronous Receiver and Transmitter (UART) for Compliant to LPC 1.1 Specifications the Intel Low Pin Count (LPC) bus interface. This -40C to +85C Industrial Temp Operation device can replace or supplement a Super I/O device to add additional serial ports to the system. Watchdog Timer with WDTOUT signal The V384 UARTs support any 16-bit I/O address 4 Independent UART channels supported by the system. The register set is based on Programmable I/O mapped base addresses the industry standard 16550 UART, so the V384 Data rates up to 3 Mbps operates with the standard serial port drivers without requiring a custom driver to be installed. Selectable RX FIFO interrupt trigger levels Auto RS-485 Half-Duplex Control mode The 128 byte Transmit and Receive FIFOs reduce CPU overhead and minimize the chance of buffer Programmable character lengths (5, 6, 7, 8) overflow and data loss. In addition to the 16550 UART with even, odd, or no parity registers, there are also Configuration register set IrDA mode and separate IRTXA and IRRXA where enhanced features such as the 9-bit (multidrop) pins for the first UART channel mode, IrDA mode and the Watchdog Timer can be 9-bit (Multidrop) mode enabled. External 24MHz/48MHz clock The V384 is available in a 48-pin TQFP package. Single 3.3V Supply Voltage ( 10% ) APPLICATIONS 5V tolerant inputs Industrial and Embedded PCs 48-TQFP package (7mm x 7mm) Factory Automation and Process Controls Network Routers System Board Designs FIGURE 1. XR28V384 BLOCK DIAGRAM VCC 3.3V 10% TX FIFO TXA/PS 3F8 IRQA Baud (IrDA Encoder) GND IRTXA Rate RX FIFO RXA Generator (IrDA Decoder) IRR XA Status and RTSA /PS CONF 2E/RS485 PCIRST Control Modem IOs DTRA /PS 3E0 IRQA LCLK LPC Registers CTSA , DSRA , CDA , RIA LFRAME Bus UART Channel A LAD 3:0 Interface TXB/PS 2F8 IRQB SERIRQ Baud TX FIFO Rate RXB Generator RX FIFO Status and RTSB /PS CONF KEY1/RS485 Control DTRB /PS 2E0 IRQB Global Modem IOs Registers CTSB , DSRB , CDB , RIB Configuration Registers UART Channel B TXC/PS 3E8 IRQC Baud TX FIFO Rate RXC Generator RX FIFO Watch Status and Dog WDTOUT RTSC /PS CONF KEY0/RS485 Control Timer Modem IOs DTRC /PS WDT Registers CTSC , DSRC , CDC , RIC UART Channel C TXD/PS 2E8 IRQD Baud TX FIFO Clock Rate CLKIN Divider RXD Generator RX FIFO Status and RTSD /RS485 Control DTRD Modem IOs Registers CTSD , DSRD , CDD , RID UART Channel D 1XR28V384 3.3V QUAD LPC UART WITH 128-BYTE FIFO REV. 1.0.2 FIGURE 2. PIN OUT ASSIGNMENT 48 47 46 45 44 43 42 41 40 39 38 37 1 36 TXB/PS 2F8 IRQB PCIRST 35 WDTOUT 2 RXB 3 34 DTRB /PS 2E0 IRQB GND 4 33 RTSB /PS CONF KEY1/RS485 LAD3 XR28V384 32 LAD2 5 DSRB 48-TQFP 6 31 LAD1 CTSB 7 30 VCC LAD0 29 8 GND LCLK 9 28 LFRAME RIC 10 27 CDC SERIRQ 26 11 TXC/PS 3E8 IRQC VCC 12 25 CLKIN RXC 13 14 15 16 17 18 19 20 21 22 23 24 (1) Ordering Information PART NUMBER OPERATING TEMPERATURE RANGE LEAD-FREE PACKAGE PACKAGING METHOD XR28V384IM48-F Tray (2) -40C to +85C 48-Lead TQFP Yes XR28V384IM48TR-F Tape and Reel XR28V384IM48-0A-EB XR28V384 Evaluation Board NOTES: 1. Refer to www.exar.com/XR28V384 for most up-to-date Ordering Information. 2. Visit www.exar.com for additional information on Environmental Rating. 2 CTSD IRTXA DSRD IRRXA RTSD /RS485 RIA DTRD CDA RXD TXA/PS 3F8 IRQA TXD/PS 2E8 IRQD RXA CDD DTRA /PS 3E0 IRQA RID RTSA /PS CONF 2E/RS485 CTSC DSRA DSRC CTSA RTSC /PS CONF KEY0/RS485 RIB DTRC /PS WDT CDB