XR88C681 CMOS Dual Channel UART (DUART) June 2006 FEATURES D Two Full Duplex, Independent Channels D Programmable Interrupt Daisy Chain D Asynchronous Receiver and Transmitter D 8 General Purpose Outputs (40 Pin DIP and 44 Pin D Quadruple-Buffered Receivers and Dual Buffered PLCC Packages Only) Transmitters D 7 General Purpose Inputs with Change of States D Programmable Stop Bits in 1/16 Bit Increments Detectors on Inputs (40 Pin DIP and 44 Pin PLCC D Internal Bit Rate Generators with More than 23 Bit Packages Only) D Multi-Drop Mode Compatible with 8051 Nine Bit Rates D Independent Bit Rate Selection for Each Transmitter Mode and Receiver D On-Chip Oscillator for Crystal D External Clock Capability D Standby Mode to Reduce Operating Power D Maximum Bit Rate: 1X Clock - 1Mb/s, 16X Clock - D Compatible with the Motorola MC2681 and Signetics SCC2692 devices 125kb/s D Normal, AUTOECHO, Local LOOPBACK and D Advanced CMOS Low Power Technology Remote LOOPBACK Modes APPLICATIONS D Multi-function 16 Bit Counter/Timer D Interrupt Output with Eight Maskable Interrupt D Multimedia Systems Conditions D Serial to Parallel/Parallel to Serial Converter D Interrupt Vector Output on Acknowledge (40 Pin DIP and 44 Pin PLCC Packages Only) D DTE for Modem Communication Systems GENERAL DESCRIPTION The EXAR Dual Universal Asynchronous Receiver and The DUART is fabricated using advanced two layer metal, Transmitter (DUART) is a data communications device that with a high performance density EPI/CMOS 1.8 process provides two fully independent full duplex asynchronous to provide high performance and low power consumption, communication channels in a single package. The DUART and is packaged in a 40 pin PDIP, a 28 pin PDIP, and a 44 is designed for use in microprocessor based systems and pin PLCC. may be used in a polled or interrupt driven environment. The XR88C681 device offers a single IC solution for the 8080/85, 8086/88, Z80, Z8000, 68xx and 65xx microprocessor families. ORDERING INFORMATION Operating Part No. Pin Package Temperature Range XR88C681CJ 44 PLCC 0C to 70C XR88C681CN/40 40 CDIP 0C to 70C XR88C681CP/28 28 PDIP 0C to 70C XR88C681CP/40 40 PDIP 0C to 70C XR88C681J 44 PLCC -40C to +85C XR88C681N/40 40 CDIP -40C to +85C XR88C681P/28 28 PDIP -40C to +85C XR88C681P/40 40 PDIP -40C to +85C Rev. 2.11 E2006XR88C681 TXDA RXDA TXDB RXDB IP0 - IP6 OP0 - OP7 TSR RSR TSR RSR IPR OPR Change of Output Port State Detectors THR RHR THR RHR Function Select Logic IPCR Mode Registers Mode Registers OPCR ACR Status Register Status Register Channel A Channel B Input Port Output Port Internal Data Bus Operation Control Interrupt Control Timing CSRA CSRB IVR CRB CRA Bit Rate Data MISR Generator Bus Command Decoder Buffer IMR Counter/Timer Address Decoder ISR Oscillator D0 - D7 A0 - A3 -RD -WR -CS RESET IEI IEO -IACK -INTR X1/CLK X2 Figure 1. Block Diagram of the XR88C681 Rev. 2.11 2