XXRRPP77771144EEVVBB--DDEEMMOO--XX FFoouurr CChhaannnneell DDiiggiittaall PPWWMM DDeemmoo BBooaarrddss s June 2012 Rev. 1.1.1 GENERAL DESCRIPTION EVALUATION BOARD MANUAL EVALUATION BOARD MANUAL The XRP7714EVB-DEMO-1, XRP7714EVB- DEMO-2, and the XRP7714-DEMO-2P Demo boards are complete, working, four channel, power systems measuring either 2 x 2, or 2 by 2.5 capable of producing over 35 watts. They provide 3.3V, 2.5V 1.8V and 1V at a maximum of 4 amps per channel. The 2.5V, 1.8V and 1V supplies can be adjusted in 50mV increments, and the 3.3V supply is adjustable in 100mV increments. The order and ramp rates for each supply can be programmed to accommodate any sequencing requirement. All power supply operations can be controlled 2 XRP7714EVB-DEMO-1 XRP7714EVB-DEMO-2/2P over an I C interface. Faults, output voltages FEATURES and currents can also be monitored. Four GPIO signals are available and can be XRP7714 Programmable Controller programmed to provide status of power good 4 Channel Power System signals enables and faults. Unused GPIO pins can be programmed as I/O expansion for a Wide Input Voltage Range: 4.5V-25V microcontroller. The board is supported by TM Over 35W Capable PowerArchitect and plugs directly onto the Exar Communications Module (XRP77XXEVB- Small Form Factor: 2.0 x 2.0 XCM). 2 I C Interface Programming Monitoring Control EVALUATION BOARD Fig. 1: XRP7714EVB-DEMO-X2/2P Schematic Exar Corporation www.exar.com 48720 Kato Road, Fremont CA 94538, USA Tel. +1 510 668-7000 Fax. +1 510 668-7001 PGND2 BST3 31 20 BST1 GH3 32 19 GH1 LX3 33 18 LX1 GL3 34 17 GL1 PGND3 35 16 PGND1 VOUT4 36 15 VCCA VOUT3 37 14 VIN2 VOUT2 38 13 VIN1 VOUT1 39 12 LDOOUT AGND 40 11 XXRRPP77771144EEVVBB--DDEEMMOO--XX FFoouurr CChhaannnneell DDiiggiittaall PPWWMM DDeemmoo BBooaarrddss PIN ASSIGNMENT AVDD 1 30 GL2 DVDD 2 29 LX2 GPIO0 3 28 GH2 GPIO1 4 27 BST2 GPIO2 5 26 VCCD XRP7714 TQFN GPIO3 6 6mm X 6mm 25 BST4 GPIO4 7 24 GH4 GPIO5 8 23 LX4 ENABLE 9 22 GL4 Exposed Pad: AGND DGND PGND4 10 21 Fig. 2: XRP7714EVB-DEMO-X Pin Assignment Pin Description Name Pin Number Description Power source for the internal linear regulators to generate VCCA, VDD and the Standby LDO (LDOOUT). Place a decoupling capacitor close to the controller IC. Also used in 39 VIN1 UVLO1 fault generation if VIN1 falls below the user programmed limit, all channels are shut down. The VIN1 pin needs to be tied to VIN2 on the board with a short trace. If the Vin2 pin voltage falls below the user programmed UVLO VIN2 level all channels are 38 VIN2 shut down. The VIN2 pin needs to be tied to VIN1 on the board with a short trace. Output of the internal 5V LDO. This voltage is internally used to power analog blocks. Note 37 VCCA that a compensation capacitor should be used on this pin (see application note). Gate Drive input voltage. This is not an output voltage. This pin can be connected to VCCA to provide power for the Gate Drive. VCCD should be connected to VCCA with the 26 VCCD shortest possible trace and decouple with a minimum 1F capacitor. Alternatively, VCCD could be connected to an external supply (not greater than 5V). Ground connection for the low side gate driver. Should be routed as the return line of the 36,31,16,21 PGND1 4 GL signal. Connect at low side FET source. Output of the internal 1.8V LDO. A decoupling capacitor should be placed between AVDD 1 AVDD and AGND close to the chip (with short traces). 2 Input for powering the internal digital logic. This pin should be connected to AVDD. DVDD Digital Ground. Connect this pin to the ground plane at the exposed pad with a separate 10 DGND trace. Analog Ground. Connect this pin to the ground plane at the exposed pad with a separate 11 AGND trace Output pin of the low side gate driver. Connect directly to the respective gate of an 35,30,17,22 GL1-GL4 external N-channel MOSFET. 2012 Exar Corporation 2/17 Rev. 1.1.1