24LCS21A-I/SN Microchip

24LCS21A 24LCS21A 24LCS21A 2 1K 2.5V Dual Mode I C Serial EEPROM Features Package Types PDIP Single supply with operation down to 2.5V NC 1 8 Vcc Completely implements DDC1/DDC2 interface for monitor identification, including NC 2 7 VCLK recovery to DDC1 Low-power CMOS technology WP 3 6 SCL - 1 mA typical active current -10 A standby current typical at 5.5V Vss 4 5 SDA 2 2-wire serial interface bus, I C compatible SOIC 100 kHz (2.5V) and 400 kHz (5V) compatibility Self-timed write cycle (including auto-erase) 1 8 NC Vcc Hardware write-protect pin Page write buffer for up to eight bytes 2 7 NC VCLK 1,000,000 erase/write cycles ensured 3 6 Data retention > 200 years WP SCL ESD Protection > 4000V 4 5 Vss SDA 8-pin PDIP and SOIC package Available for extended temperature ranges - Commercial (C): 0C to +70C - Industrial (I): -40C to +70C Block Diagram WP Description HV Generator The Microchip Technology Inc. 24LCS21A is a 128 x 8-bit dual-mode Electrically Erasable PROM. I/O Memory EEPROM This device is designed for use in applications Control Control Array XDEC requiring storage and serial transmission of configura- Logic Logic tion and control information. Two modes of operation Page Latches have been implemented: Transmit-only mode and SCL SDA Bidirectional mode. Upon power-up, the device will be YDEC in the Transmit-only mode, sending a serial bit stream VCLK of the memory array from 00h to 7Fh, clocked by the VCLK pin. A valid high-to-low transition on the SCL Sense AMP VCC R/W Control pin will cause the device to enter the transition mode, 2 VSS and look for a valid control byte on the I C bus. If it detects a valid control byte from the master, it will Pin Function Table switch into Bidirectional mode, with byte selectable read/write capability of the memory array using SCL. Name Function If no control byte is received, the device will revert to the Transmit-only mode after it receives 128 consec- WP Write-Protect (active low) utive VCLK pulses while the SCL pin is idle. The VSS Ground 24LCS21A also enables the user to write-protect the SDA Serial Address/Data I/O entire memory array using its write-protect pin. The 24LCS21A is available in a standard 8-pin PDIP and SCL Serial Clock (Bidirectional mode) SOIC package in both commercial and industrial VCLK Serial Clock (Transmit-only mode) temperature ranges. VCC +2.5V to 5.5V Power Supply DDC is a trademark of the Video Electronics Standards Assoc. NC No Connection 2 I C is a trademark of Philips Corporation. 2003 Microchip Technology Inc. DS21161F-page 124LCS21A 1.0 ELECTRICAL CHARACTERISTICS () Absolute Maximum Ratings VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied................................................................................................-65C to +125C ESD protection on all pins ...................................................................................................................................................... 4 kV NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS VCC = +2.5V to 5.5V DC CHARACTERISTICS Commercial (C): TA = 0C to +70C Industrial (I): TA = -40C to +85C Parameter Symbol Min Max Units Conditions SCL and SDA pins: High-level input voltage VIH 0.7 VCC V Low-level input voltage VIL 0.3 VCC V Input levels on VCLK pin: High-level input voltage VIH 2.0 V VCC 2.7V (Note) Low-level input voltage VIL 0.2 VCC V VCC < 2.7V (Note) Hysteresis of Schmitt Trigger inputs VHYS .05 VCC V (Note) Low-level output voltage VOL1 0.4 VIOL = 3 mA, VCC = 2.5V (Note) Low-level output voltage VOL2 0.6 VIOL = 6 mA, VCC = 2.5V Input leakage current ILI 1 AVIN = 0.1V to VCC Output leakage current ILO 1 AVOUT = 0.1V to VCC Pin capacitance (all inputs/outputs) CIN, COUT 10 pF VCC = 5.0V (Note) TA = 25C, FCLK = 1 MHz Operating current ICC Write 3 mA VCC = 5.5V ICC Read 1 mA VCC = 5.5V, SCL = 400 kHz Standby current ICCS 30 A VCC = 3.0V, SDA = SCL = VCC 100 A VCC = 5.5V, SDA = SCL = VCC VCLK = VSS Note: This parameter is periodically sampled and not 100% tested. DS21161F-page 2 2003 Microchip Technology Inc.