Revision 14 SmartFusion Customizable System-on-Chip (cSoC) Programmable Embedded FIFO Control Logic Microcontroller Subsystem (MSS) Secure ISP with 128-bit AES via JTAG Hard 100 MHz 32-bit ARM Cortex -M3 Processor FlashLock to Secure FPGA Contents 1.25 DMIPS/MHz Throughput from Zero Wait State Five Clock Conditioning Circuits (CCCs) with up to 2 Memory Integrated Analog PLLs Memory Protection Unit (MPU) Phase Shift, Multiply/Divide, and Delay Capabilities Single Cycle Multiplication, Hardware Divide Frequency: Input 1.5350 MHz, Output 0.75 to JTAG Debug (4 wires), Serial Wire Debug (SWD, 2 350 MHz wires), and Single Wire Viewer (SWV) Interfaces Internal Memory Programmable Analog Embedded Nonvolatile Flash Memory (eNVM), 128 Analog Front-End (AFE) Kbytes to 512 Kbytes Up to Three 12-Bit SAR ADCs Embedded High-Speed SRAM (eSRAM), 16 Kbytes 500 Ksps in 12-Bit Mode to 64 Kbytes, Implemented in 2 Physical Blocks to Enable Simultaneous Access from 2 Different 550 Ksps in 10-Bit Mode Masters 600 Ksps in 8-Bit Mode Multi-Layer AHB Communications Matrix Internal 2.56 V Reference or Optional External Provides up to 16 Gbps of On-Chip Memory Reference 1 Bandwidth, Allowing Multi-Master Schemes One First-Order DAC (sigma-delta) per ADC 2 10/100 Ethernet MAC with RMII Interface 8-Bit, 16-Bit, or 24-Bit 500 Ksps Update Rate Programmable External Memory Controller, Which Up to 5 High-Performance Analog Signal Conditioning Supports: Blocks (SCB) per Device, Each Including: Asynchronous Memories Two High-Voltage Bipolar Voltage Monitors (with 4 NOR Flash, SRAM, PSRAM input ranges from 2.5 V to 11.5/+14 V) with 1% Accuracy Synchronous SRAMs 2 High Gain Current Monitor, Differential Gain = 50, up Two I C Peripherals to 14 V Common Mode Two 16550 Compatible UARTs Temperature Monitor (Resolution = C in 12-Bit Two SPI Peripherals Mode Accurate from 55C to 150C) Two 32-bit Timers Up to Ten High-Speed Voltage Comparators 32-bit Watchdog Timer (t =15ns) pd 8-channel DMA Controller to Offload the Cortex-M3 from Data Transactions Analog Compute Engine (ACE) Offloads Cortex-M3Based MSS from Analog Clock Sources Initialization and Processing of ADC, DAC, and SCBs 32 KHz to 20 MHz Main Oscillator Sample Sequence Engine for ADC and DAC Parameter Battery-Backed 32 KHz Low Power Oscillator with Set-Up Real-Time Counter (RTC) Post-Processing Engine for Functions such as Low- 100 MHz Embedded RC Oscillator 1% Accurate Pass Filtering and Linear Transformation Embedded Analog PLL with 4 Output Phases (0, 90, 180, 270) Easily Configured via GUI in Libero System-on-Chip (SoC) Software High-Performance FPGA I/Os and Operating Voltage Based on proven ProASIC 3 FPGA Fabric FPGA I/Os Low Power, Firm-Error Immune 130-nm, 7-Layer Metal, Flash-Based CMOS Process LVDS, PCI, PCI-X, up to 24 mA IOH/IOL Nonvolatile, Instant On, Retains Program When Up to 350 MHz Powered Off MSS I/Os 350 MHz System Performance Schmitt Trigger, up to 6 mA IOH, 8 mA IOL Embedded SRAMs and FIFOs Up to 180 MHz Variable Aspect Ratio 4,608-Bit SRAM Blocks Single 3.3 V Power Supply with On-Chip 1.5 V Regulator x1, x2, x4, x9, and x18 Organizations External 1.5 V Is Allowed by Bypassing Regulator True Dual-Port SRAM (excluding x18) (digital VCC = 1.5 V for FPGA and MSS, analog VCC = 3.3 V and 1.5 V) 1 Theoretical maximum 2 A2F200 and larger devices November 2018 I 2018 Microsemi CorporationSmartFusion Customizable System-on-Chip (cSoC) SmartFusion cSoC Family Product Table A2F060 A2F200 A2F500 FPGA Fabric TQ144 CS288 FG256 PQ208 CS288 FG256 FG484 PQ208 CS288 FG256 FG484 System Gates 60,000 200,000 500,000 Tiles (D-flip-flops) 1,536 4,608 11,520 RAM Blocks (4,608 bits) 8 8 24 A2F060 A2F200 A2F500 Microcontroller Subsystem (MSS) TQ144 CS288 FG256 PQ208 CS288 FG256 FG484 PQ208 CS288 FG256 FG484 Flash (Kbytes) 128 256 512 SRAM (Kbytes) 16 64 64 Cortex-M3 processor with MPU Yes Yes Yes 10/100 Ethernet MAC No Yes Yes External Memory Controller (EMC) 26-/16-bit 26-bit address,16-bit data 26-/16-bit address/data address/data DMA 8 Ch 8 Ch 8 Ch 2 IC2 2 2 SPI 1 2 1 2 1 2 16550 UART 2 2 2 32-Bit Timer 2 2 2 PLL 1 1 1 2 1 2 32 KHz Low Power Oscillator 1 1 1 100 MHz On-Chip RC Oscillator 1 1 1 Main Oscillator (32 KHz to 20 MHz) 1 1 1 A2F060 A2F200 A2F500 Programmable Analog TQ144 CS288 FG256 PQ208 CS288 FG256 FG484 PQ208 CS288 FG256 FG484 ADCs (8-/10-/12-bit SAR) 1 2 2 3 DACs (8-/16-/24-bit sigma-delta) 1 2 2 3 Signal Conditioning Blocks (SCBs) 1 4 4 5 Comparator* 2 8 8 10 Current Monitors* 1 4 4 5 Temperature Monitors* 1 4 4 5 Bipolar High Voltage Monitors* 2 8 8 10 Note: *These functions share I/O pins and may not all be available at the same time. See theAnalog Front-End Overvie section in the