X-On Electronics has gained recognition as a prominent supplier of A3P125-VQG100 FPGA - Field Programmable Gate Array across the USA, India, Europe, Australia, and various other global locations. A3P125-VQG100 FPGA - Field Programmable Gate Array are a product manufactured by Microchip. We provide cost-effective solutions for FPGA - Field Programmable Gate Array, ensuring timely deliveries around the world.

A3P125-VQG100 Microchip

A3P125-VQG100 electronic component of Microchip
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Part No.A3P125-VQG100
Manufacturer: Microchip
Category: FPGA - Field Programmable Gate Array
Description: FPGA - Field Programmable Gate Array ProASIC3
Datasheet: A3P125-VQG100 Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 15.5422 ea
Line Total: USD 15.54 
Availability - 294
Ship by Mon. 18 Nov to Wed. 20 Nov
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
164
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 5
Multiples : 5
5 : USD 16.8046
25 : USD 16.563
90 : USD 16.3467
180 : USD 16.1813
270 : USD 16.0159

144
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 1
Multiples : 1
1 : USD 15.4381
100 : USD 15.3402

160
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 1
Multiples : 1
1 : USD 16.1009
100 : USD 15.9951

135
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 1
Multiples : 1
1 : USD 17.2255
100 : USD 17.0535

6
Ship by Wed. 27 Nov to Mon. 02 Dec
MOQ : 1
Multiples : 1
1 : USD 14.9777

294
Ship by Mon. 18 Nov to Wed. 20 Nov
MOQ : 1
Multiples : 1
1 : USD 15.5422
270 : USD 15.2847
1080 : USD 14.6059
5040 : USD 13.5994

144
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 1
Multiples : 1
1 : USD 15.4381
100 : USD 15.3402

164
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 5
Multiples : 5
5 : USD 22.7199
25 : USD 22.3931
90 : USD 22.1007
180 : USD 21.8771
270 : USD 21.6535

160
Ship by Wed. 20 Nov to Tue. 26 Nov
MOQ : 1
Multiples : 1
1 : USD 16.1009
100 : USD 15.9951

   
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We are delighted to provide the A3P125-VQG100 from our FPGA - Field Programmable Gate Array category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the A3P125-VQG100 and other electronic components in the FPGA - Field Programmable Gate Array category and beyond.

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Revision 18 DS0097 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Advanced I/O Features and Benefits 700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above) High Capacity 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation 15 K to 1 M System Gates Wide Range Power Supply Voltage Support per JESD8-B, Up to 144 Kbits of True Dual-Port SRAM Allowing I/Os to Operate from 2.7 V to 3.6 V Up to 300 User I/Os Bank-Selectable I/O Voltagesup to 4 Banks per Chip Single-Ended I/O Standards: LVTTL, LVCMOS 3.3V/ Reprogrammable Flash Technology 2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X and LVCMOS 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS 2.5 V / 5.0 V Input Process Differential I/O Standards: LVPECL, LVDS, B-LVDS, and Instant On Level 0 Support M-LVDS (A3P250 and above) Single-Chip Solution I/O Registers on Input, Output, and Enable Paths Retains Programmed Design when Powered Off Hot-Swappable and Cold Sparing I/Os High Performance Programmable Output Slew Rate and Drive Strength 350 MHz System Performance Weak Pull-Up/-Down 3.3 V, 66 MHz 64-Bit PCI IEEE 1149.1 (JTAG) Boundary Scan Test In-System Programming (ISP) and Security Pin-Compatible Packages across the ProASIC3 Family ISP Using On-Chip 128-Bit Advanced Encryption Standard Clock Conditioning Circuit (CCC) and PLL (AES) Decryption (except ARM -enabled ProASIC 3 devices) Six CCC Blocks, One with an Integrated PLL via JTAG (IEEE 1532compliant) Configurable Phase-Shift, Multiply/Divide, Delay Capabilities FlashLock to Secure FPGA Contents and External Feedback Low Power Wide Input Frequency Range (1.5 MHz to 350 MHz) Core Voltage for Low Power Embedded Memory Support for 1.5 V-Only Systems 1 Kbit of FlashROM User Nonvolatile Memory Low-Impedance Flash Switches SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit RAM High-Performance Routing Hierarchy Blocks (1, 2, 4, 9, and 18 organizations) Segmented, Hierarchical Routing and Clock Structure True Dual-Port SRAM (except 18) ARM Processor Support in ProASIC3 FPGAs M1 ProASIC3 DevicesARM Cortex -M1 Soft Processor Available with or without Debug 1 ProASIC3 Devices A3P015 A3P030 A3P060 A3P125 A3P250 A3P400 A3P600 A3P1000 2 Cortex-M1 Devices M1A3P250 M1A3P400 M1A3P600 M1A3P1000 System Gates 15,000 30,000 60,000 125,000 250,000 400,000 600,000 1,000,000 Typical Equivalent Macrocells 128 256 512 1,024 2,048 VersaTiles (D-flip-flops) 384 768 1,536 3,072 6,144 9,216 13,824 24,576 RAM Kbits (1,024 bits) 18 36 36 54 108 144 4,608-Bit Blocks 4 8 8 12 24 32 FlashROM Kbits 11 1 1 1 1 1 1 3 Secure (AES) ISP Yes Yes Yes Yes Yes Yes Integrated PLL in CCCs 1 1 1 1 1 1 4 VersaNet Globals 6 6 18 18 18 18 18 18 I/O Banks 22 2 2 4 4 4 4 Maximum User I/Os 49 81 96 133 157 194 235 300 Notes: 1. A3P015 is not recommended for new designs. 2. Refer to the Cortex-M1 product brief for more information. 3. AES is not available for Cortex-M1 ProASIC3 devices. 4. Six chip (main) and three quadrant global networks are available for A3P060 and above. 5. The M1A3P250 device does not support this package. 6. For higher densities and support of additional features, refer to the ProASIC3E Flash Family FPGAs datasheet. 7. Package not available. A3P015 and A3P030 devices do not support this feature. Supported only by A3P015 and A3P030 devices. March 2016 I 2016 Microsemi CorporationProASIC3 Flash Family FPGAs 1 ProASIC3 Devices A3P015 A3P030 A3P060 A3P125 A3P250 A3P400 A3P600 A3P1000 2 Cortex-M1 Devices M1A3P250 M1A3P400 M1A3P600 M1A3P1000 Package Pins 7 7 7 QFN QN68 QN48, QN68, QN132 QN132 QN132 7 QN132 CS CS121 VQFP VQ100 VQ100 VQ100 VQ100 TQFP TQ144 TQ144 PQFP PQ208 PQ208 PQ208 PQ208 PQ208 5 FBGA FG144 FG144 FG144/256 FG144/256/ FG144/256/ FG144/256/ 484 484 484 Notes: 1. A3P015 is not recommended for new designs. 2. Refer to the Cortex-M1 product brief for more information. 3. AES is not available for Cortex-M1 ProASIC3 devices. 4. Six chip (main) and three quadrant global networks are available for A3P060 and above. 5. The M1A3P250 device does not support this package. 6. For higher densities and support of additional features, refer to the ProASIC3E Flash Family FPGAs datasheet. 7. Package not available. II Revision 18

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8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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