is an FPGA device designed for applications in consumer, automotive, and industrial control. It is a low-power, high-performance device with a Turing architecture optimized for performance. It offers 6,000 logic elements, a maximum configuration speed of 100 MHz, up to 180 Kbits of block RAM, up to 64 DSP48E1 slices, and up to four clock management tiles. It also supports up to six high-speed transceivers, up to five number system conversion chips, and up to five SPI-4.2/QDRII+ designer ports. As a field programmable gate array, it can be programmed using a variety of hardware and software development systems.