Features EE Programmable 65,536 x 1-, 131,072 x 1-, 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and 4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays (FPGAs) Supports both 3.3V and 5.0V Operating Voltage Applications In-System Programmable (ISP) via Two-Wire Bus Simple Interface to SRAM FPGAs Compatible with Atmel AT6000, AT40K and AT94K Devices, Altera FLEX , APEX , Xilinx XC3000, XC4000, XC5200, Spartan , Virtex FPGAs Devices, ORCA FPGA Cascadable Read-back to Support Additional Configurations or Higher-density Arrays Very Low-power CMOS EEPROM Process Configuration Programmable Reset Polarity Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-compatible with 8-lead SOIC/VOIC EEPROM Packages), 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC and 44-lead TQFP Packages Memory Emulation of Atmels AT24CXXX Serial EEPROMs Low-power Standby Mode High-reliability AT17LV65 Endurance: 100,000 Write Cycles Data Retention: 90 Years for Industrial Parts (at 85 C) and 190 Years for AT17LV128 Commercial Parts (at 70 C) Green (Pb/Halide-free/RoHS Compliant) Package Options Available AT17LV256 AT17LV512 1. Description The AT17LV series FPGA Configuration EEPROMs (Configurators) provide an easy- AT17LV010 to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17LV series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20- AT17LV002 lead PLCC, 20-lead SOIC and 44-lead TQFP, see Table 1-1. The AT17LV series Configurators uses a simple serial-access procedure to configure one or more FPGA AT17LV040 devices. The user can select the polarity of the reset function by programming four EEPROM bytes. These devices also support a write-protection mechanism within its programming mode. 3.3V and 5V The AT17LV series configurators can be programmed with industry-standard pro- grammers, Atmels ATDH2200E Programming Kit or Atmels ATDH2225 ISP Cable. System Support 2321ICNFG2/08Table 1-1. AT17LV Series Packages AT17LV65/ AT17LV128/ AT17LV512/ Package AT17LV256 AT17LV010 AT17LV002 AT17LV040 (3) 8-lead LAP Yes Yes Yes 8-lead PDIP Yes Yes Use 8-lead Use 8-lead (3) 8-lead SOIC Yes (1) (1) LAP LAP 20-lead PLCC Yes Yes Yes (2) (2) (2) 20-lead SOIC Yes Yes Yes 44-lead TQFP Yes Yes Notes: 1. The 8-lead LAP package has the same footprint as the 8-lead SOIC. Since an 8-lead SOIC package is not available for the AT17LV512/010/002 devices, it is possible to use an 8-lead LAP package instead. 2. The pinout for the AT17LV65/128/256 devices is not pin-for-pin compatible with the AT17LV512/010/002 devices. 3. Refer to the AT17Fxxx datasheet, available on the Atmel web site. 2. Pin Configuration Figure 2-1. 8-lead LAP DATA 1 8 VCC CLK 2 7 SER EN (1) (WP ) RESET/OE 3 6 CEO (A2) CE 4 5 GND Figure 2-2. 8-lead SOIC DATA 1 8 VCC CLK 2 7 SER EN (1) (WP ) RESET/OE 3 6 CEO (A2) CE 4 5 GND Figure 2-3. 8-lead PDIP DATA 1 8 VCC CLK 2 7 SER EN (1) (WP ) RESET/OE 3 6 CEO (A2) CE 4 5 GND 2 AT17LV65/128/256/512/010/002/040 2321ICNFG2/08