AT24C01C and AT24C02C 2 I C-Compatible (2-wire) Serial EEPROM 1-Kbit (128 x 8), 2-Kbit (256 x 8) DATASHEET Features Low-voltage Operation V = 1.7V to 5.5V CC Internally Organized as 128 x 8 (1K) or 256 x 8 (2K) 2 I C Compatible (2-wire) Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 400kHz (1.7V) and 1MHz (2.5V, 2.7V, 5.0V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page Write Mode Partial Page Writes Allowed Self-timed Write Cycle (5ms max) High-reliability Endurance: 1,000,000 Write Cycles Data Retention: 100 Years Green Package Options (Pb/Halide-free/RoHS-compliant) 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 5-lead SOT23, and 8-ball VFBGA Die Sale Options: Wafer Form and Tape and Reel Available Description The Atmel AT24C01C/02C provides 1024/2048-bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 128/256 words of eight bits each. Both devices include a cascading feature that allows up to eight devices to share a common 2-wire bus. These devices are optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C01C/02C are available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead UDFN, 5-lead SOT23, and 8-ball VFBGA packages. In addition, the entire family operates from 1.7V to 5.5V V . CC Atmel-8700H-SEEPROM-AT24C01C-02C-Datasheet 1220161. Pin Configurations and Pinouts Table 1-1. Pin Descriptions Pin Pin Asserted Pin Number Symbol Pin Name and Functional Description State Type Address Inputs: The A , A , and A pins are device address inputs that 2 1 0 1, 2, 3 A A are hard wired. As many as eight 1-Kbit or 2-Kbit devices may be Input 0 2 addressed on a single bus system. Ground: The ground reference for the power supply. GND should be 4 GND Power connected to the system ground. Serial Data: The SDA pin is bidirectional for serial data transfer. This pin Input/ 5 SDA is open drain driven and may be wire-ORed with any number of other Output open drain or open collector devices. Serial Clock Input: The SCL input is used to positive edge clock data 6 SCL into each EEPROM device and negative edge clock data out of each Input device. Write Protect: Provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to Ground (GND). 7 WP Input When the Write Protect pin is connected to V , the write protection CC feature is enabled and operates as shown in Table 5-1. Device Power Supply: The V pin is used to supply the source voltage CC 8 V to the device. Operations at invalid V voltages may produce spurious Power CC CC results and should not be attempted. Note: 1. For use of 5-lead SOT23, the software A2, A1, and A0 bits in the device address word must be set to zero to properly communicate. 8-pad UDFN 8-lead SOIC 8-lead TSSOP 1 8 A V 0 CC A 1 8 V 0 CC A V 0 1 8 CC 2 7 2 7 A WP A1 WP 1 2 7 WP A 1 3 6 SCL A 3 6 SCL 2 3 6 A2 SCL A 4 5 2 SDA 4 5 GND SDA 4 5 GND GND SDA Top View Top View Top View 8-lead PDIP 5-lead SOT23 8-ball VFBGA 1 8 A V A 1 8 V 0 CC 0 CC SCL 1 5 WP 2 7 2 A1 WP A 7 WP 1 GND 2 3 6 A SCL 3 2 A 6 SCL 2 4 5 3 4 GND SDA SDA V CC 4 GND 5 SDA Top View Top View Top View Note: Package drawings are not to scale. 2 AT24C01C/02C DATASHEET Atmel-8700H-SEEPROM-AT24C01C-02C-Datasheet 122016